MAXQ610A-0000+ Maxim Integrated Products, MAXQ610A-0000+ Datasheet - Page 15

IC MCU 16BIT 64K IR MOD 32TQFN

MAXQ610A-0000+

Manufacturer Part Number
MAXQ610A-0000+
Description
IC MCU 16BIT 64K IR MOD 32TQFN
Manufacturer
Maxim Integrated Products
Series
MAXQ™r
Datasheets

Specifications of MAXQ610A-0000+

Core Processor
RISC
Core Size
16-Bit
Speed
12MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Infrared, Power-Fail, POR, WDT
Number Of I /o
20
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
32-TQFN Exposed Pad
Processor Series
MAXQ610
Core
RISC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
SPI, USART
Maximum Clock Frequency
12 MHz
Number Of Timers
4
Operating Supply Voltage
1.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Controller Family/series
MAXQ
No. Of I/o's
24
Ram Memory Size
2048Byte
Cpu Speed
12MHz
No. Of Timers
2
Embedded Interface Type
JTAG, SPI, USART
Rohs Compliant
Yes
Number Of Programmable I/os
32
Development Tools By Supplier
MAXQ610-KIT
Package
32TQFN EP
Family Name
MAXQ
Maximum Speed
12 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
90-M6800+B01
Figure 6. Receive Burst-Count Example
ever two IRCA cycles elapse without getting a qualified
edge. The IRIF interrupt flag thus denotes absence of
the carrier and the beginning of a space in the receive
signal. When the RXBCNT bit is changed from 0 to 1,
the IRMT register is set to 0001h. The IRCFME bit is still
used to define whether the IRV register is counting sys-
tem IRCLK clocks or IRCA-defined carrier cycles. The
IRXRL bit is still used to define whether the IRV register
is reloaded with 0000h on detection of a qualified edge
(per the IRXSEL[1:0] bits). Figure 6 and the descriptive
sequence embedded in the figure illustrate the expect-
ed usage of the receive burst-count mode.
1
TO
IRMT
IRRX
IRV
4
5
6
7
8
9
16-Bit Microcontroller with Infrared Module
CAPTURE INTERRUPT (IRIF = 1).
IRV ≥ IRMT.
IRV = 0 (IF IRXRL = 1).
SOFTWARE SETS IRCA = CARRIER FREQUENCY.
SOFTWARE SETS RXBCNT = 1 (WHICH CLEARS IRMT = 0001 IN HARDWARE).
SOFTWARE CLEARS IRCFME = 0 SO THAT IRV COUNTS CARRIER CYCLES. IRV IS RESET TO 0 ON QUALIFIED EDGE DETECTION IF IRXRL = 1.
SOFTWARE ADDS TO IRMT THE NUMBER OF PULSES USED FOR CARRIER MEASUREMENT.
IRCA x 2x COUNTER FOR SPACE CAN BEGIN IMMEDIATELY (QUALIFIED EDGE RESETS).
QUALIFIED EDGE DETECTED: IRMT++
IRV RESET TO 0 IF IRXRL = 1.
IRCA x 2 PERIOD ELAPSES: IRIF = 1; CARRIER ABSENCE = SPACE.
BURST MARK = IRMT PULSES.
SOFTWARE CLEARS RXBCNT = 0 SO THAT WE CAPTURE ON THE NEXT QUALIFIED EDGE.
QUALIFIED EDGE DETECTED: IRIF = 1, CAPTURE IRV ≥ IRMT AS THE BURST SPACE (PLUS UP TO ONE CARRIER CYCLE).
SOFTWARE SET RXBCNT = 1 AS IN (5).
CONTINUE (5) TO (8) UNTIL LEARNING SPACE EXCEEDS SOME DURATION. IRV ROLLOVERS CAN BE USED.
CARRIER FREQUENCY
CALCULATION
1
______________________________________________________________________________________
2
3
4
5
6
IRMT = PULSE COUNTING
7
IRV = CARRIER CYCLE COUNTING
The MAXQ61H provides two timers/counters that sup-
port the following functions:
• 16-bit timer/counter
• 16-bit up/down autoreload
• Counter function of external pulse
• 16-bit timer with capture
• 16-bit timer with compare
• Input/output enhancements for pulse-width modulation
• Set/reset/toggle output state on comparator match
• Prescaler with 2n divider (for n = 0, 2, 4, 6, 8, 10)
16-Bit Timers/Counters
IRMT = PULSE COUNTING
8
9
15

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