UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 269
UPD78F0513AGA-GAM-AX
Manufacturer Part Number
UPD78F0513AGA-GAM-AX
Description
MCU 8BIT 48-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGA-GAM-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0513AGA-GAM-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD78F0513AGA-GAM-AX
Manufacturer:
NEC
Quantity:
20 000
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78K0/Kx2
6.6.10 Peripheral hardware and source clocks
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Peripheral Hardware
16-bit timer/
event counter
8-bit timer/
event counter
8-Bit timer
Watch timer
Watchdog timer
Buzzer output
Clock output
A/D converter
Serial interface
The following lists peripheral hardware and source clocks incorporated in the 78K0/Kx2 microcontrollers.
Remark The peripheral hardware depends on the product. See 1.7 Block Diagram and 1.8 Outline of Functions.
Notes 1. The 78K0/KB2 is not provided with a subsystem clock.
Remark Y: Can be selected, N: Cannot be selected
2. Do not start the peripheral hardware operation with the external clock from peripheral hardware pins when
Source Clock
the internal high-speed oscillation clock and high-speed system clock are stopped while the CPU operates
with the subsystem clock, or when in the STOP mode.
00
01
50
51
H0
H1
UART0
UART6
CSI10
CSI11
CSIA0
IIC0
Hardware Clock
Peripheral
Table 6-13. Peripheral Hardware and Source Clocks
(f
PRS
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
)
Subsystem Clock
(f
SUB
N
N
N
N
N
N
Y
N
N
Y
N
N
N
N
N
N
N
)
Note 1
Speed Oscillation
Internal Low-
Clock (f
N
N
N
N
N
Y
N
Y
N
N
N
N
N
N
N
N
N
RL
)
CHAPTER 6 CLOCK GENERATOR
TM50 Output
N
N
N
N
Y
N
N
N
N
N
N
Y
Y
N
N
N
N
Y (SCKA0 pin)
Y (SCK10 pin)
Y (SCK11 pin)
Y (TI000 pin)
Y (TI001 pin)
from Peripheral
Y (TI50 pin)
Y (TI51 pin)
Hardware Pins
External Clock
SCL0 pin)
Y (EXSCL0,
N
N
N
N
N
N
N
N
N
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
269
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