UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 99

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UPD78F0513AGA-GAM-AX

Manufacturer Part Number
UPD78F0513AGA-GAM-AX
Description
MCU 8BIT 48-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0513AGA-GAM-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0513AGA-GAM-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD78F0513AGA-GAM-AX
Manufacturer:
NEC
Quantity:
20 000
78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Data memory
space
Notes 1. When boot swap is not used: Set the option bytes to 0080H to 0084H.
Remark The flash memory is divided into blocks (one block = 1 KB). For the address values and block numbers, see
Figure 3-2. Memory Map (
Program
memory space
2. Writing boot cluster 0 can be prohibited depending on the setting of security (see 27.8 Security Settings).
Table 3-3 Correspondence Between Address Values and Block Numbers in Flash Memory.
When boot swap is used:
FEDFH
FEFFH
FEE0H
FBFFH
FFFFH
FC00H
FF00H
3FFFH
4000H
0000H
Special function registers
Internal high-speed RAM
General-purpose
32
Flash memory
16384
registers
256
768
Reserved
μ
PD78F0501, 78F0501A, 78F0511, 78F0511A, 78F0521, 78F0521A, 78F0531,
(SFR)
3 B F F H
3 F F F H
3 C 0 0 H
0 7 F F H
0 3 F F H
0 4 0 0 H
0 0 0 0 H
8 bits
8 bits
8 bits
8 bits
Set the option bytes to 0080H to 0084H and 1080H to 1084H.
Block 0FH
Block 01H
Block 00H
and 78F0531A)
3FFFH
0FFFH
07FFH
1085H
1084H
1080H
107FH
1000H
0800H
0085H
0084H
0080H
007FH
0040H
003FH
0000H
1 KB
CHAPTER 3 CPU ARCHITECTURE
Option byte area
Option byte area
CALLT table area
CALLF entry area
Vector table area
Program area
Program area
Program area
1915
2048
64
64
5
5
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
Note 1
Note 1
1FFFH
Boot cluster 0
Boot cluster 1
Note 2
99

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