UPD78F0513AGA-GAM-AX Renesas Electronics America, UPD78F0513AGA-GAM-AX Datasheet - Page 502

• Manufacturer Part Number: UPD78F0513AGA-GAM-AX
• Description: MCU 8BIT 48-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGA-GAM-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(b) Serial interface CSI11
CSIE11 TRMD11 SSE11 PM03 P03 PM02 P02 PM04 P04 PM05 P05
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
0
1
1
1
1
1
1
Notes 1. Can be set as port function.
Remark ×:
0
0
1
1
0
1
1
2. To use P02/SO11 as general-purpose port, set the serial clock selection register 11 (CSIC11) in the
3
4
×
0
1
0
1
0
1
0
0
0
CSIE11:
TRMD11:
CKP11:
CKS112, CKS111, CKS110: Bits 2 to 0 of CSIC11
PM0×:
P0×:
default status (00H).
To use P04/SCK11 as port pins, clear CKP11 to 0.
To use the slave mode, set CKS112, CKS111, and CKS110 to 1, 1, 1.
×
×
×
Note 1
Note 1
Note 1
1
1
1
1
Table 16-2. Relationship Between Register Settings and Pins (2/2)
×
×
×
Note 1
Note 1
Note 1
×
×
×
×
×
×
×
Note 1
Note 1
Note 1
0
0
0
0
×
×
×
Note 1
Note 1
Note 1
0
0
0
0
×
Note 1
1
1
1
0
0
0
don’t care
Bit 7 of serial operation mode register 11 (CSIM11)
Bit 6 of CSIM11
Bit 4 of serial clock selection register 11 (CSIC11)
Port mode register
Port output latch
×
Note 1
×
×
×
1
1
1
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
×
×
×
×
×
×
×
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
1
1
1
×
×
×
×
×
×
×
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
×
×
×
transmission
transmission/
transmission/
reception
reception
transmission
Operation
reception
reception
Master
Master
Master
CSI11
Slave
Slave
Slave
Stop
Note 4
Note 4
Note 4
SI11/
SI11
SI11
SI11
SI11
P03
P03
P03
P03
P02
P02
P02
SO11/
SO11
SO11
SO11
SO11
P02
Pin Function
Note 2
Note 2
Note 2
SCK11/
(output)
(output)
(output)
P04
SCK11
SCK11
SCK11
SCK11
SCK11
SCK11
(input)
(input)
(input)
P04
Note 4
Note 4
Note 4
Note 3
TI001/P05
SSI11/
TI001/
TI001/
TI001/
TI001/
TI001/
TI001/
TI001/
SSI11
SSI11
SSI11
P05
P05
P05
P05
P05
P05
P05
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