PIC17C756-33I/L Microchip Technology, PIC17C756-33I/L Datasheet - Page 122
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC17C756-33I/L
Manufacturer Part Number
PIC17C756-33I/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-33I/L
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-33I/L
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 122 of 321
- Download datasheet (3Mb)
TABLE 14-10: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE TRANSMISSION
TABLE 14-11: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE RECEPTION
DS30264A-page 122
Address
Address
16h, Bank 1
17h, Bank 1
13h, Bank 0
15h, Bank 0
16h, Bank 0
17h, Bank 0
10h, Bank 4
11h, Bank 4
13h, Bank 4
16h, Bank 4
15h, Bank 4
17h, Bank 4
Legend: x = unknown, u = unchanged, - = unimplemented read as a '0', shaded cells are not used for synchronous
Note 1: Other (non power-up) resets include: external reset through MCLR and Watchdog Timer Reset.
16h, Bank1
17h, Bank1
13h, Bank0
14h, Bank0
15h, Bank 0
17h, Bank 0
10h, Bank 4
11h, Bank 4
13h, Bank 4
14h, Bank 4
15h, Bank 4
17h, Bank 4
Legend: x = unknown, u = unchanged, - = unimplemented read as a '0', shaded cells are not used for synchronous
Note 1: Other (non power-up) resets include: external reset through MCLR and Watchdog Timer Reset.
slave transmission.
slave reception.
Name
PIR1
PIE1
RCSTA1
TXSTA1
TXREG1
SPBRG1
PIR2
PIE2
RCSTA2
TXREG2
TXSTA2
SPBRG2
Name
PIR1
PIE1
RCSTA1
RCREG1
TXSTA1
SPBRG1
PIR2
PIE2
RCSTA2
RCREG2
TXSTA2
SPBRG2
Baud rate generator register
Baud rate generator register
Baud rate generator register
Baud rate generator register
SSPIE
SSPIE
CSRC
SSPIF
CSRC
CSRC
SSPIF
CSRC
SPEN
SPEN
SPEN
SPEN
RBIF
RBIE
RBIF
RBIE
Bit 7
Bit 7
RX7
RX7
TX7
TX7
TMR3IF TMR2IF TMR1IF
TMR3IE TMR2IE TMR1IE
TMR3IF TMR2IF TMR1IF
TMR3IE TMR2IE TMR1IE
BCLIE
BCLIE
BCLIF
BCLIF
Bit 6
Bit 6
RX9
TX9
TX6
RX9
TX6
TX9
RX9
RX6
TX9
RX9
RX6
TX9
SREN
SREN
SREN
SREN
TXEN
TXEN
TXEN
TXEN
ADIE
ADIE
Bit 5
ADIF
Bit 5
ADIF
TX5
TX5
RX5
RX5
CREN
SYNC
CREN
SYNC
CREN
SYNC
CREN
SYNC
Bit 4
Bit 4
TX4
TX4
RX4
RX4
Preliminary
—
—
—
—
CA2IF
CA2IE
CA4IF
CA4IE
CA2IF
CA2IE
CA4IF
CA4IE
Bit 3
Bit 3
RX3
RX3
TX3
TX3
—
—
—
—
—
—
—
—
CA1IE
CA3IE
CA1IE
CA3IE
CA1IF
FERR
CA3IF
FERR
CA1IF
FERR
CA3IF
FERR
Bit 2
Bit 2
RX2
RX2
TX2
TX2
—
—
—
—
TX1IE
OERR
TRMT
TX2IE
OERR
TRMT
TX1IE
OERR
TRMT
TX2IE
OERR
TRMT
TX1IF
TX2IF
TX1IF
TX2IF
Bit 1
Bit 1
RX1
RX1
TX1
TX1
RC1IF
RC1IE
RC2IF
RC2IE
RC1IF
RC1IE
RC2IF
RC2IE
RX9D
RX9D
RX9D
RX9D
TX9D
TX9D
TX9D
TX9D
Bit 0
Bit 0
RX0
RX0
TX0
TX0
1997 Microchip Technology Inc.
0000 0010
0000 0000
0000 -00x
0000 --1x
xxxx xxxx
xxxx xxxx
000- 0010
000- 0000
0000 -00x
xxxx xxxx
0000 --1x
xxxx xxxx
0000 0010
0000 0000
0000 -00x
xxxx xxxx
0000 --1x
xxxx xxxx
000- 0010
000- 0000
0000 -00x
xxxx xxxx
0000 --1x
xxxx xxxx
Value on
Value on
POR,
POR,
BOR
BOR
other resets
other resets
Value on all
Value on all
0000 0010
0000 0000
0000 -00u
0000 --1u
uuuu uuuu
uuuu uuuu
000- 0010
000- 0000
0000 -00u
uuuu uuuu
0000 --1u
uuuu uuuu
0000 0010
0000 0000
0000 -00u
uuuu uuuu
0000 --1u
uuuu uuuu
000- 0010
000- 0000
0000 -00u
uuuu uuuu
0000 --1u
uuuu uuuu
(Note1)
(Note1)
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