PIC17C756-33I/L Microchip Technology, PIC17C756-33I/L Datasheet - Page 68
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PIC17C756-33I/L
Manufacturer Part Number
PIC17C756-33I/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-33I/L
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-33I/L
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 68 of 321
- Download datasheet (3Mb)
10.2
PORTB is an 8-bit wide bi-directional port. The corre-
sponding data direction register is DDRB. A '1' in
DDRB configures the corresponding port pin as an
input. A '0' in the DDRB register configures the corre-
sponding port pin as an output. Reading PORTB reads
the status of the pins, whereas writing to it will write to
the port latch.
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is
done by clearing the RBPU (PORTA<7>) bit. The weak
pull-up is automatically turned off when the port pin is
configured as an output. The pull-ups are enabled on
any reset.
PORTB also has an interrupt on change feature. Only
pins configured as inputs can cause this interrupt to
occur (i.e. any RB7:RB0 pin configured as an output is
excluded from the interrupt on change comparison).
The input pins (of RB7:RB0) are compared with the
value in the PORTB data latch. The “mismatch” outputs
of RB7:RB0 are OR’ed together to set the PORTB
Interrupt Flag bit, RBIF (PIR1<7>).
FIGURE 10-5: BLOCK DIAGRAM OF RB5:RB4 AND RB1:RB0 PORT PINS
DS30264A-page 68
Note: I/O pins have protection diodes to V
Weak
Pull-Up
PORTB and DDRB Registers
OE
DD
and V
SS
Port
Input Latch
.
Port
Data
Preliminary
Q
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the inter-
rupt by:
a)
b)
A mismatch condition will continue to set the RBIF bit.
Reading then writing PORTB will end the mismatch
condition, and allow the RBIF bit to be cleared.
This interrupt on mismatch feature, together with soft-
ware configurable pull-ups on this port, allows easy
interface to a keypad and make it possible for wake-up
on key-depression. For an example, refer to Applica-
tion Note AN552, “Implementing Wake-up on Key-
stroke.”
The interrupt on change feature is recommended for
wake-up on operations where PORTB is only used for
the interrupt on change feature and key depression
operations.
CK
Read-Write PORTB (such as; MOVPF PORTB,
PORTB). This will end mismatch condition.
Then, clear the RBIF bit.
D
Match Signal
from other
port pins
Q
CK
1997 Microchip Technology Inc.
D
Peripheral Data in
RBPU
WR_PORTB (Q4)
RD_PORTB (Q2)
WR_DDRB (Q4)
RD_DDRB (Q2)
(PORTA<7>)
Data Bus
RBIF
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