PIC17C756-33I/L Microchip Technology, PIC17C756-33I/L Datasheet - Page 198
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC17C756-33I/L
Manufacturer Part Number
PIC17C756-33I/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-33I/L
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC17C756-33I/L
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 198 of 321
- Download datasheet (3Mb)
DCFSNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
Example:
DS30264A-page 198
Before Instruction
After Instruction
operation
Decode
TEMP_VALUE
TEMP_VALUE
If TEMP_VALUE
If TEMP_VALUE
Q1
Q1
No
PC
PC
register 'f'
operation
Decrement f, skip if not 0
[ label ] DCFSNZ f,d
0
d
(f) – 1
skip if not 0
None
The contents of register 'f' are decre-
mented. If 'd' is 0 the result is placed in
WREG. If 'd' is 1 the result is placed
back in register 'f'.
If the result is not 0, the next instruc-
tion, which is already fetched, is dis-
carded, and an NOP is executed
instead making it a two-cycle instruc-
tion.
1
1(2)
HERE
ZERO
NZERO
Read
0010
Q2
Q2
No
f
[0,1]
255
=
=
=
=
=
(dest);
DCFSNZ
:
:
011d
operation
?
TEMP_VALUE - 1,
0;
Address (ZERO)
0;
Address (NZERO)
Process
Data
Q3
Q3
No
ffff
TEMP, 1
destination
operation
Write to
Q4
Q4
No
ffff
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
After Instruction
operation
Decode
PC =
Q1
No
Address (THERE)
Read literal
operation
Unconditional Branch
[ label ]
0
k
k<12:8>
PC
None
GOTO allows an unconditional branch
anywhere within an 8K page bound-
ary. The thirteen bit immediate value is
loaded into PC bits <12:0>. Then the
upper eight bits of PC are loaded into
PCLATH. GOTO is always a two-cycle
instruction.
1
2
GOTO THERE
110k
Q2
No
'k'
k
PC<12:0>;
:13>
1997 Microchip Technology Inc.
8191
GOTO k
kkkk
PCLATH<4:0>,
operation
Process
Data
PCLATH<7:5>
Q3
No
kkkk
Write to PC
operation
Q4
No
kkkk
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