PIC17C756-33I/L Microchip Technology, PIC17C756-33I/L Datasheet - Page 174
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PIC17C756-33I/L
Manufacturer Part Number
PIC17C756-33I/L
Description
MICRO CTRL 16K MEMORY OTP 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(4 pages)
4.PIC17C752-16L.pdf
(6 pages)
5.PIC17C756CL.pdf
(321 pages)
Specifications of PIC17C756-33I/L
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
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Quantity
Price
Part Number:
PIC17C756-33I/L
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC17C752-16L PDF datasheet #2
- PIC17C752-16L PDF datasheet #3
- PIC17C752-16L PDF datasheet #4
- PIC17C756CL PDF datasheet #5
- Current page: 174 of 321
- Download datasheet (3Mb)
16.6
The absolute accuracy specified for the A/D converter
includes the sum of all contributions for quantization
error, integral error, differential error, full scale error, off-
set error, and monotonicity. It is defined as the maxi-
mum deviation from of an actual transition versus an
ideal transition for any code. The absolute error of the
A/D converter is specified at < + 1 LSb for V
(over the device’s specified operating range). How-
ever, the accuracy of the A/D converter will degrade as
V
For a given range of analog inputs, the output digital
code will be the same. This is due to the quantization
of the analog input to a digital code. Quantization error
is typically + 1/2 LSb and is inherent in the analog to
digital conversion process. The only way to reduce
quantization error is to increase the resolution of the
A/D converter.
Offset error measures the first actual transition of a
code versus the first ideal transition of a code. Offset
error shifts the entire transfer function. Offset error can
be calibrated out of a system or introduced into a sys-
tem through the interaction of the total leakage current
and source impedance at the analog input.
Gain error measures the maximum deviation of the last
actual transition and the last ideal transition adjusted
for offset error. This error appears as a change in slope
of the transfer function. The difference is gain error to
full scale error is that full scale doe not take offset error
into account. Gain error can be calibrated out in soft-
ware.
Linearity error refers to the uniformity of the code
changes. Linearity errors cannot be calibrated out of
the system. Integral non-linearity error measures the
actual code transition versus the ideal code transition
adjusted by the gain error for each code.
Differential non-linearity measures the maximum actual
code width versus the ideal code width. This measure
is unadjusted.
The maximum pin leakage current is
In systems where the device frequency is low, use of
the A/D RC clock is preferred. At moderate to high fre-
quencies, T
lator. T
when derived from T
phase clock transitions. This reduces, to a large extent,
the effects of digital switching noise. This is not possi-
ble with the RC derived clock. The loss of accuracy due
to digital switching noise can be significant if many I/O
pins are active.
In systems where the device will enter SLEEP mode
after the start of the A/D conversion, the RC clock
source selection is required. In this mode, the digital
noise from the modules in SLEEP are stopped. This
method gives high accuracy.
DS30264A-page 174
DD
8 s for preferred operation. This is because T
diverges from V
AD
A/D Accuracy/Error
must not violate the minimum and should be
AD
should be derived from the device oscil-
REF
OSC
.
, is kept away from on-chip
1 A.
DD
= V
REF
Preliminary
AD
,
16.7
A device reset forces all registers to their reset state.
This forces the A/D module to be turned off, and any
conversion is aborted.
The value that is in the ADRESH:ADRESL registers is
not
ADRESH:ADRESL registers will contain unknown data
after a Power-on Reset.
16.8
If the input voltage exceeds the rail values (V
by greater than 0.3V, then the accuracy of the conver-
sion is out of specification.
An external RC filter is sometimes added for anti-alias-
ing of the input signal. The R component should be
selected to ensure that the total source impedance is
kept under the 10 k recommended specification. Any
external components connected (via hi-impedance) to
an analog input pin (capacitor, zener diode, etc.) should
have very little leakage current at the pin.
16.9
The transfer function of the A/D converter is as follows:
the first transition occurs when the analog input voltage
(V
FIGURE 16-6: A/D TRANSFER FUNCTION
16.10
A good reference for the undestanding A/D converter is
the "Analog-Digital Conversion Handbook" third edi-
tion,
0-13-03-2848-0).
AIN
) equals Analog V
3FFh
3FEh
003h
002h
001h
000h
modified
published
Effects of a Reset
Connection Considerations
Transfer Function
References
for
by
Analog input voltage
REF
a
1997 Microchip Technology Inc.
/ 1024 (Figure 16-6).
Prentice
Power-on
Hall
Reset.
SS
or V
(ISBN
The
DD
)
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