AT90S4433-8PI Atmel, AT90S4433-8PI Datasheet - Page 18
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AT90S4433-8PI
Manufacturer Part Number
AT90S4433-8PI
Description
IC MCU 4K FLSH 8MHZ A/D IT 28DIP
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheet
1.AT90S4433-8AC.pdf
(126 pages)
Specifications of AT90S4433-8PI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90S4433-8PI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
18
AT90S/LS4433
Table 2. AT90S4433 I/O Space
Note:
All AT90S4433 I/Os and peripherals are placed in the I/O space. The I/O locations are
accessed by the IN and OUT instructions transferring data between the 32 general pur-
pose working registers and the I/O space. I/O Registers within the address range $00 -
$1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to
the instruction set section for more details. When using the I/O specific commands IN
and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O Registers as
SRAM, $20 must be added to this address. All I/O Register addresses throughout this
document are shown with the SRAM address in parentheses.
For compatibility with future devices, reserved bits should be written to zero when
accessed. Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical “1” to them. Note that the CBI
and SBI instructions will operate on all bits in the I/O Register, writing a one back into
any flag read as set, thus clearing the flag. The CBI and SBI instructions work with reg-
isters $00 to $1F only.
The I/O and Peripherals Control Registers are explained in the following sections.
(SRAM Address)
I/O Address
$0D ($2D)
$0C ($2C)
$0E ($2E)
$0B ($2B)
$0A ($2A)
$0F ($2F)
$17 ($37)
$16 ($36)
$15 ($35)
$14 ($34)
$13 ($33)
$12 ($32)
$11 ($31)
$10 ($30)
$09 ($29)
$08 ($28)
$07 ($27)
$06 ($26)
$05 ($25)
$04 ($24)
$03 ($23)
1. Reserved and unused locations are not shown in the table.
Name
DDRB
PINB
PORTC
DDRC
PINC
PORTD
DDRD
PIND
SPDR
SPSR
SPCR
UDR
UCSRA
UCSRB
UBRR
ACSR
ADMUX
ADCSR
ADCH
ADCL
UBRRHI
(1)
Function
Data Direction Register, Port B
Input Pins, Port B
Data Register, Port C
Data Direction Register, Port C
Input Pins, Port C
Data Register, Port D
Data Direction Register, Port D
Input Pins, Port D
SPI I/O Data Register
SPI Status Register
SPI Control Register
UART I/O Data Register
UART Control and Status Register A
UART Control and Status Register B
UART Baud Rate Register
Analog Comparator Control and Status Register
ADC Multiplexer Select Register
ADC Control and Status Register
ADC Data Register High
ADC Data Register Low
UART Baud Rate Register High
(Continued)
1042H–AVR–04/03