ATMEGA323-8AC Atmel, ATMEGA323-8AC Datasheet - Page 58
![IC AVR MCU 32K 8MHZ COM 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA323-8AC
Manufacturer Part Number
ATMEGA323-8AC
Description
IC AVR MCU 32K 8MHZ COM 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA323L-4PC.pdf
(247 pages)
Specifications of ATMEGA323-8AC
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA3238AC
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Timer/Counter1 – TCNT1H
and TCNT1L
58
ATmega323(L)
When the prescaler is set to divide by 8, the timer will count like this:
... | C-1, C-1, C-1, C-1, C-1, C-1, C-1, C-1 | C, C, C, C, C, C, C, C | 0, 0, 0, 0, 0, 0, 0, 0
|1,1,1,1,1,1,1,1|...
In PWM mode, this bit has a different function. If the CTC1 bit is cleared in PWM mode,
the Timer/Counter1 acts as an up/down counter. If the CTC1 bit is set (one), the
Timer/Counter wraps when it reaches the TOP value. Refer to page 60 for a detailed
description.
• Bits 2..0 – CS12, CS11, CS10: Clock Select1, Bit 2, 1, and 0
The Clock Select1 bits 2, 1, and 0 define the prescaling source of Timer/Counter1.
Table 19. Clock 1 Prescale Select
The Stop condition provides a Timer Enable/Disable function. The prescaled modes are
scaled directly from the CK Oscillator clock. If the external pin modes are used for
Timer/Counter1, transitions on PB1/(T1) will clock the counter even if the pin is config-
ured as an output. This feature can give the user SW control of the counting.
This 16-bit register contains the prescaled value of the 16-bit Timer/Counter1. To
ensure that both the high and Low Bytes are read and written simultaneously when the
CPU accesses these registers, the access is performed using an 8-bit temporary regis-
ter (TEMP). This temporary register is also used when accessing OCR1A, OCR1B, and
ICR1. If the main program and also interrupt routines perform access to registers using
TEMP, interrupts must be disabled during access from the main program and interrupt
routines.
Bit
$2D ($4D)
$2C ($4C)
Read/Write
Initial Value
CS12
0
0
0
0
1
1
1
1
MSB
R/W
R/W
15
7
0
0
CS11
0
0
1
1
0
0
1
1
R/W
R/W
14
6
0
0
CS10
0
1
0
1
0
1
0
1
R/W
R/W
13
5
0
0
Description
Stop, the Timer/Counter1 is Stopped.
CK
CK/8
CK/64
CK/256
CK/1024
External Pin T1, Falling Edge
External Pin T1, Rising Edge
R/W
R/W
12
4
0
0
R/W
R/W
11
3
0
0
R/W
R/W
10
2
0
0
R/W
R/W
9
1
0
0
LSB
R/W
R/W
1457G–AVR–09/03
8
0
0
0
TCNT1H
TCNT1L
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