PIC16C774-E/L Microchip Technology, PIC16C774-E/L Datasheet - Page 99

• Manufacturer Part Number: PIC16C774-E/L
• Description: IC MCU OTP 4KX14 A/D PWM 44PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C774-E/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-PLCC
• For Use With: DVA16XL441 - ADAPTER DEVICE ICE 44PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC16C774E/L

9.1
The BRG supports both the Asynchronous and Syn-
chronous modes of the USART. It is a dedicated 8-bit
baud rate generator. The SPBRG register controls the
period of a free running 8-bit timer. In asynchronous
mode bit BRGH (TXSTA<2>) also controls the baud
rate. In synchronous mode bit BRGH is ignored.
Table 9-1
baud rate for different USART modes which only apply
in master mode (internal clock).
Given the desired baud rate and Fosc, the nearest inte-
ger value for the SPBRG register can be calculated
using the formula in
baud rate can be determined.
Example 9-1
error for the following conditions:
TABLE 9-1
X = value in SPBRG (0 to 255)
TABLE 9-2
Address Name
98h
18h
99h
Legend: x = unknown, - = unimplemented read as '0'. Shaded cells are not used by the BRG.
1999 Microchip Technology Inc.
SYNC
0
1
F
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
OSC
USART Baud Rate Generator (BRG)
shows the formula for computation of the
TXSTA
RCSTA
SPBRG Baud Rate Generator Register
= 16 MHz
shows the calculation of the baud rate
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Table
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
CSRC
SPEN
Bit 7
9-1. From this, the error in
Bit 6
RX9
BRGH = 0 (Low Speed)
TX9
SREN CREN ADDEN
TXEN
Bit 5
Advance Information
SYNC
Bit 4
OSC
OSC
/(64(X+1))
/(4(X+1))
Bit 3
—
EXAMPLE 9-1:
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared). This ensures the
BRG does not wait for a timer overflow before output-
ting the new baud rate.
9.1.1
The data on the RC7/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
Desired Baud rate = Fosc / (64 (X + 1))
Calculated Baud Rate=16000000 / (64 (25 + 1))
Error
BRGH TRMT
FERR OERR RX9D
Bit 2
9600 =
X
=
=
=
=
SAMPLING
Bit 1
(Calculated Baud Rate - Desired Baud Rate)
=
9615
(9615 - 9600) / 9600
0.16%
OSC
16000000 /(64 (X + 1))
/(16(X + 1)) equation can reduce the
Baud Rate= F
25.042 = 25
TX9D
Bit 0
CALCULATING BAUD RATE
ERROR
BRGH = 1 (High Speed)
Desired Baud Rate
PIC16C77X
0000 -010
0000 000x
0000 0000
Value on:
POR,
BOR
NA
OSC
DS30275A-page 99
/(16(X+1))
0000 -010
0000 000x
0000 0000
other resets
Value on all