ATMEGA64-16MC Atmel, ATMEGA64-16MC Datasheet - Page 262

• Manufacturer Part Number: ATMEGA64-16MC
• Description: IC AVR MCU 64K 16MHZ COM 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64-16MC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-MLF®, 64-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Scanning the Clock
Pins
2490Q–AVR–06/10
The AVR devices have many clock options selectable by fuses. These are: Internal RC Oscilla-
tor, External RC, External Clock, (High Frequency) Crystal Oscillator, Low-frequency Crystal
Oscillator, and Ceramic Resonator.
Figure 131
The Enable signal is supported with a general boundary-scan cell, while the Oscillator/clock out-
put is attached to an observe-only cell. In addition to the main clock, the timer Oscillator is
scanned in the same way. The output from the internal RC Oscillator is not scanned, as this
Oscillator does not have external connections.
Figure 131. Boundary-scan Cells for Oscillators and Clock Options
Table 102
XTAL1/XTAL2 connections as well as 32 kHz Timer Oscillator.
Table 102. Scan Signals for the Oscillators
Notes:
Enable
Signal
EXTCLKEN
OSCON
RCOSCEN
OSC32EN
TOSKON
Previous
1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift between
3. The clock configuration is programmed by fuses. As a fuse does not change run-time, the
From
Cell
summaries the scan registers for the external clock pin XTAL1, oscillators with
the internal Oscillator and the JTAG TCK clock. If possible, scanning an external clock is
preferred.
clock configuration is considered fixed for a given application. The user is advised to scan the
same clock option as to be used in the final system. The enable signals are supported in the
scan chain because the system logic can disable clock options in sleep modes, thereby dis-
shows how each Oscillator with external connection is supported in the scan chain.
ShiftDR
0
1
ClockDR
Scanned Clock
Line
EXTCLK (XTAL1)
OSCCK
RCCK
OSC32CK
TOSCK
D
UpdateDR
Q
Next
Cell
To
D
G
Q
EXTEST
0
1
Clock Option
External Clock
External Crystal
External Ceramic Resonator
External RC
Low Freq. External Crystal
32 kHz Timer Oscillator
XTAL1/TOSC1
(1)(2)(3)
ENABLE
Oscillator
XTAL2/TOSC2
OUTPUT
Scanned Clock Line
Previous
From
Cell
when Not Used
ATmega64(L)
ShiftDR
0
1
ClockDR
0
0
0
1
0
D
FF1
Q
Next
Cell
To
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