ATMEGA165-16MI Atmel, ATMEGA165-16MI Datasheet - Page 207
ATMEGA165-16MI
Manufacturer Part Number
ATMEGA165-16MI
Description
IC AVR MCU 16K 16MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA165-16MI
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Figure 97. Block Diagram
2573G–AVR–07/09
TDI
TDO
TCK
TMS
CONTROLLER
M
U
X
TAP
DEVICE BOUNDARY
INSTRUCTION
BREAKPOINT
SCAN CHAIN
REGISTER
REGISTER
REGISTER
BYPASS
ID
DECODER
ADDRESS
The IEEE std. 1149.1 also specifies an optional TAP signal; TRST – Test ReSeT –
which is not provided.
When the JTAGEN fuse is unprogrammed, these four TAP pins are normal port pins
and the TAP controller is in reset. When programmed and the JTD bit in MCUCSR is
cleared, the TAP pins are internally pulled high and the JTAG is enabled for Boundary-
scan and programming. The device is shipped with this fuse programmed.
For the On-chip Debug system, in addition to the JTAG interface pins, the RESET pin is
monitored by the debugger to be able to detect external reset sources. The debugger
can also pull the RESET pin low to reset the whole system, assuming only open collec-
tors on the reset line are used in the application.
JTAG PROGRAMMING
MEMORY
FLASH
AND CONTROL
BREAKPOINT
OCD STATUS
INTERFACE
UNIT
Address
Data
I/O PORT 0
I/O PORT n
INTERNAL
FLOW CONTROL
CHAIN
SCAN
UNIT
BOUNDARY SCAN CHAIN
PC
Instruction
JTAG / AVR CORE
COMMUNICATION
PERIPHERAL
INTERFACE
AVR CPU
DIGITAL
UNITS
ATmega165/V
PERIPHERIAL
ANALOG
UNITS
Control & Clock lines
Analog inputs
207
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