EP9301-CQ Cirrus Logic Inc, EP9301-CQ Datasheet - Page 108

• Manufacturer Part Number: EP9301-CQ
• Description: IC ARM920T MCU 166MHZ 208-LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9301-CQ

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 598-1248

3
3-38
MaverickCrunch Co-Processor
EP93xx User’s Guide
3.5.7 Floating Point Arithmetic Instructions
31:28
31:28
31:28
cond
cond
cond
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
1 1 1 0
27:24
1 1 1 0
1 1 1 0
27:24
27:24
Compare 64-bit Integers
Single Precision Floating Point Absolute Value
Double Precision Floating Point Absolute Value
Rd:
Compares two 64-bit integers and stores an integer representing the result in
the ARM920T register; the highest four bits of the integer result match the N,
Z, C, and V bits, respectively, in the ARM920T’s program status register, while
the bottom 28 bits are zeros. If Rd = 15, then the four status bits are stored in
the ARM status register, CPSR.
CFCMP64<cond> Rd, CRn, CRm
CRn:
CRm:
Rd:
Computes the absolute value of a single precision floating point number:
CFABSS<cond> CRd, CRn
CRd:
CRn:
Computes the absolute value of a double precision floating point number.
CFABSD<cond> CRd, CRn
CRd = |CRn|
23:22
23:22
23:22
0 0
0 0
0 0
21
0
21:20
21:20
1 1
1 1
Copyright 2007 Cirrus Logic
20
1
Destination ARM register. If Rd = 15, destination is ARM
N, C, Z, and V flags.
First source register
Second source register
Destination ARM register. If Rd = 15, destination is ARM
N, C, Z, and V flags.
Destination register
Source register
19:16
19:16
19:16
CRn
CRn
CRn
15:12
15:12
15:12
CRd
CRd
Rd
0 1 0 0
0 1 0 0
0 1 0 1
11:8
11:8
11:8
0 0 0
0 0 1
1 0 1
7:5
7:5
7:5
4
4
0
0
4
1
DS785UM1
CRm
CRm
CRm
3:0
3:0
3:0