EP9301-CQ Cirrus Logic Inc, EP9301-CQ Datasheet - Page 365

• Manufacturer Part Number: EP9301-CQ
• Description: IC ARM920T MCU 166MHZ 208-LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9301-CQ

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 598-1248

GlIntMsk
DS785UM1
INT
31
15
Definition:
Bit Descriptions:
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
30
14
29
13
28
12
Global Interrupt Status Register
RSVD:
INT:
0x8001_0064 - Read/Write
0x0000_0000
0x0000_0000
Global Interrupt Mask Register. This register is used to mask the GlIntSts bit,
to allow of block interrupts to the processor.
RSVD:
INT:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
Global interrupt bit. This bit is set whenever the MACint
signal to the interrupt controller is active. Writing a one to
this bit location will clear this bit until a new interrupt
condition occurs.
Reserved. Unknown During Read.
Global interrupt mask bit. When set, any interrupt enabled
by the Interrupt Enable Register will set the Global
Interrupt Status interrupt bit. When clear, no interrupts will
reach the processor.
24
8
RSVD
RSVD
23
7
22
6
21
1/10/100 Mbps Ethernet LAN Controller
5
20
4
19
3
EP93xx User’s Guide
18
2
17
1
16
9-63
0
9