STR912FW44X6 STMicroelectronics, STR912FW44X6 Datasheet - Page 30
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STR912FW44X6
Manufacturer Part Number
STR912FW44X6
Description
MCU 512K FLASH 96K SRAM USB CAN
Manufacturer
STMicroelectronics
Series
STR9r
Datasheet
1.STR910FM32X6.pdf
(73 pages)
Specifications of STR912FW44X6
Core Processor
ARM9
Core Size
32-Bit
Speed
96MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
For Use With
497-8267 - BOARD EVAL BASED ON STR9MCBSTR9UME - BOARD EVAL MCBSTR9 + ULINK-MEMCBSTR9U - BOARD EVAL MCBSTR9 + ULINK2497-5859 - EVAL BRD FULL USB DONGLE STR912MCBSTR9 - BOARD EVAL STM STR9 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5063-2
497-5063-2
497-5063-2ND
STR912FW44X6T
497-5063-2
497-5063-2ND
STR912FW44X6T
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STR912FW44X6
Manufacturer:
ST
Quantity:
20 000
Functional overview
2.25.1 DMA
2.26
2.27
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A programmable DMA channel may be assigned by CPU firmware to service each timer/
counter module TIM0 and TIM1 for fast and direct transfers.
Three-phase induction motor controller (IMC)
The STR91xF provides an integrated controller for variable speed motor control applications.
Six PWM outputs are generated on high current drive pins P6.0 to P6.5 for controlling a three-
phase AC induction motor drive circuit assembly. Rotor speed feedback is provided by
capturing a tachometer input signal on pin P6.6, and an asynchronous hardware emergency
stop input is available on pin P6.7 to stop the motor immediately if needed, independently of
firmware.
The IMC unit has the following features:
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External memory interface (EMI)
STR91xF devices in 128-pin packages offer an external memory bus for connecting external
parallel peripherals and memories. The EMI bus resides on ports 7, 8, and 9 and operates with
either an 8 or 16-bit data path. The configuration of 8 or 16 bit mode is specified by CPU
firmware writing to configuration registers at run-time. If the application does not use the EMI
bus, then these port pins may be used for general purpose I/O as shown in
The EMI has the following features:
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Three PWM outputs generated using a 10-bit PWM counter, one for each phase U, V, W.
Complimentary PWM outputs are also generated for each phase.
Choice of classic or zero-centered PWM generation modes
10-bit PWM counter clock is supplied through a programmable 8-bit prescaler of the APB
clock.
Programmable 6-bit dead-time generator to add delay to each of the three complimentary
PWM outputs
8-bit repetition counter
Automatic rotor speed measurement with 16-bit resolution. Schmitt trigger tachometer
input with programmable edge detection
Hardware asynchronous emergency stop input
A dedicated interrupt to CPU with eight flags
Supports static asynchronous memory access cycles, including page mode for non-mux
operation.
Four configurable memory regions, each with a chip select output (EMI_CS0n ...
EMI_CS3n)
Programmable wait states per memory region for both write and read operations
16-bit multiplexed data mode
are multiplexed together on ports 8 and 9, while port 7 contains eight more high-order
address signals. The output signal on pin EMI_ALE is used to demultiplex the signals on
ports 8 and 9, and the polarity of EMI_ALE is programmable. The output signals on pins
EMI_BWR_WRLn and EMI_WRHn are the write strobes for the low and high data bytes
(Figure
4): 16 bits of data and 16 bits of low-order address
Table
3.
STR91xF