STR912FW44X6 STMicroelectronics, STR912FW44X6 Datasheet - Page 56
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STR912FW44X6
Manufacturer Part Number
STR912FW44X6
Description
MCU 512K FLASH 96K SRAM USB CAN
Manufacturer
STMicroelectronics
Series
STR9r
Datasheet
1.STR910FM32X6.pdf
(73 pages)
Specifications of STR912FW44X6
Core Processor
ARM9
Core Size
32-Bit
Speed
96MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
For Use With
497-8267 - BOARD EVAL BASED ON STR9MCBSTR9UME - BOARD EVAL MCBSTR9 + ULINK-MEMCBSTR9U - BOARD EVAL MCBSTR9 + ULINK2497-5859 - EVAL BRD FULL USB DONGLE STR912MCBSTR9 - BOARD EVAL STM STR9 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5063-2
497-5063-2
497-5063-2ND
STR912FW44X6T
497-5063-2
497-5063-2ND
STR912FW44X6T
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STR912FW44X6
Manufacturer:
ST
Quantity:
20 000
Electrical characteristics
6.11.7 Electrical Sensitivities
Notes:
1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC
6.12
Notes: 1 The internal EMI Bus clock signal is available externally only on LFBGA144 packages (ball M8),
56/73
specifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the
JEDEC criteria (international standard).
2 EMI_ratio =1/ 2 by default (can be programmed to be 1 by setting the proper bits in the
●
Prequalification trials:
Most of the common failures (unexpected reset and program counter corruption) can be
reproduced by manually forcing a low state on the RESET pin or the Oscillator pins for 1
second.
To complete these trials, ESD stress can be applied directly on the device, over the range of
specification values. When unexpected behavior is detected, the software can be hardened to
prevent unrecoverable errors occurring (see application note AN1015).
External memory bus timings
V
Table 20.
and not available on LQFP packages.
SCU_CLKCNTR register)
Table 21.
t
t
t
t
t
t
t
t
Symbol
BCLK
RCR
RP
RDS
RDH
RAS
RAH
AW
DDQ
Symbol
DLU
LU
Critical Data corruption (control registers...)
= 2.7 - 3.6V, V
Read to CSn inactive
Read Pulse Width
Read Data Setup Time
Read Data Hold Time
Read Address Setup Time
Read Address Hold Time
ALE pulse width
EMI Bus Clock Period
Symbol
EMI read operation
Static latch-up class
Dynamic latch-up class
Parameter
Parameter
DD
= 1.65 - 2V, T
EMI Bus Clock period
T
V
f
(ALE_LENGTH) x t
OSC
A
A
(WSTRD-WSTOEN+1) x
DDQ
=+25°C
(WSTOEN) x t
= -40 / 85 °C, C
/f
=3.3V, V
CPUCLK
Parameter
t
BCLK
Min
-1
4
0
0
=4 MHz/96 MHz
DD
- 1
=1.8V,
BCLK
Conditions
BCLK
L
= 30 pF unless otherwise specified.
- 1
- 1
Value
(ALE_LENGTH) x t
(WSTRD-WSTOEN+1) x
(WSTOEN) x t
1 /(f
t
BCLK
HCLK
Max
+1
+ 1
Value
x EMI_ratio)
BCLK
BCLK
+ 1
Class
STR91xF
+ 1
A
A
1)
Unit
ns
ns
ns
ns
ns
ns
ns