DSP56F805FV80 Freescale Semiconductor, DSP56F805FV80 Datasheet - Page 15

• Manufacturer Part Number: DSP56F805FV80
• Description: IC DSP 80MHZ 31.5K FLASH 144LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxr

Specifications of DSP56F805FV80

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 71KB (35.5K x 16)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

2.8 Serial Peripheral Interface (SPI) Signals
Freescale Semiconductor
No. of
Pins
1
1
1
1
GPIOE6
GPIOE5
GPIOE4
GPIOE7
Signal
Name
SCLK
MISO
MOSI
SS
Table 2-12 Serial Peripheral Interface (SPI) Signals
Signal
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Type
Input
State During
Reset
Input
Input
Input
Input
Input
Input
Input
Input
56F805 Technical Data, Rev. 16
SPI Master In/Slave Out (MISO)—This serial data pin is an input to
a master device and an output from a slave device. The MISO line
of a slave device is placed in the high-impedance state if the slave
device is not selected.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as an input or output pin.
After reset, the default state is MISO.
SPI Master Out/Slave In (MOSI)—This serial data pin is an output
from a master device and an input to a slave device. The master
device places data on the MOSI line a half-cycle before the clock
edge that the slave device uses to latch the data.
Port E GPIO—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is MOSI.
SPI Serial Clock—In master mode, this pin serves as an output,
clocking slaved listeners. In slave mode, this pin serves as the data
clock input.
Port E GPIO—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is SCLK.
SPI Slave Select—In master mode, this pin is used to arbitrate
multiple masters. In slave mode, this pin is used to select the slave.
Port E GPIO—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is SS.
Signal Description
Serial Peripheral Interface (SPI) Signals
15