DSP56F805FV80 Freescale Semiconductor, DSP56F805FV80 Datasheet - Page 23

• Manufacturer Part Number: DSP56F805FV80
• Description: IC DSP 80MHZ 31.5K FLASH 144LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxr

Specifications of DSP56F805FV80

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 71KB (35.5K x 16)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Freescale Semiconductor
Output Low Voltage (at IOL)
Output source current
Output sink current
PWM pin output source current
PWM pin output sink current
Input capacitance
Output capacitance
V
Low Voltage Interrupt, external power supply
Low Voltage Interrupt, internal power supply
Power on Reset
1. Schmitt Trigger inputs are: EXTBOOT, IRQA, IRQB, RESET, ISA0-2, FAULTA0-3, ISB0-2, FAULT0B-3, TCS, TCK, TRST, TMS,
TDI, and MSCAN_RX
2. Analog inputs are: ANA[0:7], XTAL and EXTAL. Specification assumes ADC is not sampling.
3. PWM pin output source current measured with 50% duty cycle.
4. PWM pin output sink current measured with 50% duty cycle.
5. I
6. Run (operating) I
measured with all modules enabled.
7. Wait I
than 50pF on all outputs. C
with PLL enabled.
8. This low voltage interrupt monitors the V
via separate traces. If V
conditions when V
9. This low voltage interrupt monitors the internally regulated core power supply. If the output from the internal voltage is regulator
drops below V
unless the external power supply drops below the minimum specified value (3.0V).
10. Power
up, this signal remains active as long as the internal 2.5V is below 1.5V typical, no matter how long the ramp-up rate is. The internally
regulated voltage is typically 100mV less than V
DD
Operating Conditions:
supply current
DDT
Wait
Stop
Run
= I
DD
–
7
DD
6
on reset occurs whenever the internally regulated 2.5V digital supply drops below 1.5V typical. While power is ramping
measured using external square wave clock source (f
EIC
+ I
10
DDA
, an interrupt is generated. Since the core logic supply is internally regulated, this interrupt will not be generated
DDA
DD
(Total supply current for V
>V
measured using 8MHz clock source. All inputs 0.2V from rail; outputs unloaded. All ports configured as inputs;
DDA
EIO
Table 3-4 DC Electrical Characteristics (Continued)
L
= 20pF on EXTAL; all ports configured as inputs; EXTAL capacitance linearly affects wait I
(between the minimum specified V
Characteristic
drops below V
4
3
V
SS
= V
SSA
EIO
DDA
, an interrupt is generated. Functionality of the device is guaranteed under transient
= 0 V, V
DD
DD
56F805 Technical Data, Rev. 16
9
8
external power supply. V
+ V
during ramp-up until 2.5V is reached, at which time it self-regulates.
DDA
DD
)
= V
DD
DDA
osc
and the point when the V
= 3.0–3.6 V, T
= 8MHz) into XTAL; all inputs 0.2V from rail; no DC loads; less
DDA
is generally connected to the same potential as V
Symbol
C
I
V
I
V
V
I
DDT
V
I
OHP
C
I
OLP
A
POR
OH
OUT
OL
EIO
EIC
OL
IN
= –40° to +85°C, C
5
EIO
interrupt is generated).
Min
2.4
2.0
10
16
—
—
—
—
—
—
—
4
4
L
≤
DC Electrical Characteristics
Typ
126
105
2.7
2.2
1.7
50pF, f
12
60
—
—
—
—
—
8
op
DD
Max
152
129
0.4
3.0
2.4
2.0
84
—
—
—
—
—
—
= 80MHz
; measured
Unit
DD
mA
mA
mA
mA
mA
mA
mA
pF
pF
V
V
V
V
23