MC68HC11F1CPU4 Freescale Semiconductor, MC68HC11F1CPU4 Datasheet - Page 17

• Manufacturer Part Number: MC68HC11F1CPU4
• Description: IC MCU 512 EEPROM 4MHZ 80-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11F1CPU4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

2.2 Reset (RESET )
2.3 E-Clock Output (E)
2.4 Crystal Driver and External Clock Input (XTAL, EXTAL)
TECHNICAL DATA
An active low bidirectional control signal, RESET, acts as an input to initialize the MCU
to a known start-up state. It also acts as an open-drain output to indicate that an inter-
nal failure has been detected in either the clock monitor or COP watchdog circuit. The
CPU distinguishes between internal and external reset conditions by sensing whether
the reset pin rises to a logic one in less than two E-clock cycles after a reset has oc-
curred. It is not advisable to connect an external resistor-capacitor (RC) power-up de-
lay circuit to the reset pin of M68HC11 devices because the circuit charge time
constant can cause the device to misinterpret the type of reset that occurred. Refer to
SECTION 5 RESETS AND INTERRUPTS for further information.
Figure 2-3 illustrates a reset circuit that uses an external switch. Other circuits can be
used, however, it is important to incorporate a low voltage interrupt (LVI) circuit to pre-
vent operation at insufficient voltage levels which could result in erratic behavior or cor-
ruption of RAM.
E is the output connection for the internally generated E clock. The signal from E is
used as a timing reference. The frequency of the E-clock output is one fourth that of
the input frequency at the EXTAL pin. When E-clock output is low, an internal process
is taking place. When it is high, data is being accessed. All clocks, including the E
clock, are halted when the MCU is in STOP mode. The E clock can be turned off in
single-chip modes to reduce the effects of radio frequency interference (RFI). Refer to
SECTION 9 TIMING SYSTEM .
These two pins provide the interface for either a crystal or a CMOS-compatible clock
to control the internal clock generator circuitry. Either a crystal oscillator or a CMOS
compatible clock can be used. The resulting E-clock rate is the input frequency divided
by four.
RESET SWITCH
MANUAL
OPTIONAL POWER-ON DELAY
AND MANUAL RESET SWITCH
4.7 k
Freescale Semiconductor, Inc.
For More Information On This Product,
V
DD
Figure 2-3 External Reset Circuit
4.7 k
1.0 F
Go to: www.freescale.com
PIN DESCRIPTIONS
MC34164
GND
IN
RESET
2
3
1
MC34064
V
GND
IN
DD
RESET
2
3
1
V
DD
4.7 k
OF M68HC11
TO RESET
2-3