MC68HC11F1CPU4 Freescale Semiconductor, MC68HC11F1CPU4 Datasheet - Page 57

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MC68HC11F1CPU4

Manufacturer Part Number
MC68HC11F1CPU4
Description
IC MCU 512 EEPROM 4MHZ 80-LQFP
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11F1CPU4

Core Processor
HC11
Core Size
8-Bit
Speed
4MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
30
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-

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4.5.3 General-Purpose Chip Select
TECHNICAL DATA
$FFFF
$C000
$E000
$FE00
$0000
$1000
$8000
The general-purpose chip select (CSGEN) is the most flexible and has the most con-
trol bits. Polarity of the active state, E-valid or address-valid timing, size, starting ad-
dress, and clock delay are all programmable.
A single bit in CSCTL selects a priority between CSGEN and CSPROG. Bits in CSG-
SIZ select between address valid or E-clock valid timing, determine the polarity of the
active state and the address range of CSGEN. The value contained in the CSGADR
register determines the starting address for CSGEN. Depending on the size selected
for CSGEN, some bits in CSGADR will be invalid (don’t cares). Note that CSGEN is
disabled when a size of zero is selected. Refer to Figure 4-4.
EXPANDED
MODE
Figure 4-3 Address Map for I/O and Program Chip Selects
x000
x05F
x060
x7FF
x800
xFFF
Freescale Semiconductor, Inc.
OPERATING MODES AND ON-CHIP MEMORY
For More Information On This Product,
96-BYTE REGISTER
BLOCK
I/O CHIP SELECT 1
(CSIO1)
I/O CHIP SELECT 2
(CSIO2)
Go to: www.freescale.com
REMAPPABLE TO
4-KBYTE BOUNDARY
0000
8000
C000
E000
FFFF
PSIZ[A:B] = 0:0
64K
PSIZ[A:B] = 0:1
32K
PSIZ[A:B] = 1:0
16K
PSIZ[A:B] = 1:1
8K
PROGRAM CHIP SELECT
(CSPROG)
FFC0
FFFF
VECTORS
4-19

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