MC68HC16Z1CPV25 Freescale Semiconductor, MC68HC16Z1CPV25 Datasheet - Page 200

• Manufacturer Part Number: MC68HC16Z1CPV25
• Description: IC MPU 1K RAM 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CPV25

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: Q1141110

8.8 Pin Considerations
8.8.1 Analog Reference Pins
8.8.2 Analog Power Pins
8-14
Result Data Format
right-justified format
Refer to
The ADC requires accurate, noise-free input signals for proper operation. The follow-
ing sections discuss the design of external circuitry to maximize ADC performance.
No A/D converter can be more accurate than its analog reference. Any noise in the
reference can result in at least that much error in a conversion. The reference for the
ADC, supplied by pins V
tain a noise-free, clean signal. In many cases, simple capacitive bypassing may suf-
fice. In extreme cases, inductors or ferrite beads may be necessary if noise or RF
energy is present. Series resistance is not advisable since there is an effective DC cur-
rent requirement from the reference voltage by the internal resistor string in the RC
DAC array. External resistance may introduce error in this architecture under certain
conditions. Any series devices in the filter network should contain a minimum amount
of DC resistance.
For accurate conversion results, the analog reference voltages must be within the lim-
its defined by V
The analog supply pins (V
ages (V
the analog input circuitry.
left-justified format
left-justified format
Unsigned
Unsigned
Signed
RH
APPENDIX D REGISTER SUMMARY
and V
DDA
RL
Conversion result is unsigned right-justified data. Bits [9:0] are used for 10-bit resolution,
bits [7:0] are used for 8-bit conversion (bits [9:8] are zero). Bits [15:10] always return zero
when read.
Conversion result is signed left-justified data. Bits [15:6] are used for 10-bit resolution, bits
[15:8] are used for 8-bit conversion (bits [7:6] are zero). Although the ADC is unipolar, it
is assumed that the zero point is (V RH – V RL ) / 2 when this format is used. The value read
from the register is an offset two’s-complement number; for positive input, bit 15 equals
zero, for negative input, bit 15 equals one. Bits [5:0] always return zero when read.
Conversion result is unsigned left-justified data. Bits [15:6] are used for 10-bit resolution,
bits [15:8] are used for 8-bit conversion (bits [7:6] are zero). Bits [5:0] always return zero
when read.
) and of the analog multiplexer inputs.
Freescale Semiconductor, Inc.
and V
For More Information On This Product,
Table 8-9 Result Register Formats
RH
ANALOG-TO-DIGITAL CONVERTER
DDA
SSA
and V
Go to: www.freescale.com
, as explained in the following subsection.
and V
RL
, should be low-pass filtered from its source to ob-
SSA
) define the limits of the analog reference volt-
Description
for register mapping and configuration.
Figure 8-4
M68HC16 Z SERIES
USER’S MANUAL
is a diagram of