MC68HC908GR8CFA Freescale Semiconductor, MC68HC908GR8CFA Datasheet - Page 256

• Manufacturer Part Number: MC68HC908GR8CFA
• Description: IC MCU FLSH 8BIT8MHZ 7.5K32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908GR8CFA

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Serial Communications Interface (SCI)
Technical Data
256
Address:
SCTIE — SCI Transmit Interrupt Enable Bit
TCIE — Transmission Complete Interrupt Enable Bit
SCRIE — SCI Receive Interrupt Enable Bit
ILIE — Idle Line Interrupt Enable Bit
TE — Transmitter Enable Bit
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This read/write bit enables the SCTE bit to generate SCI transmitter
CPU interrupt requests. Reset clears the SCTIE bit.
This read/write bit enables the TC bit to generate SCI transmitter CPU
interrupt requests. Reset clears the TCIE bit.
This read/write bit enables the SCRF bit to generate SCI receiver
CPU interrupt requests. Reset clears the SCRIE bit.
This read/write bit enables the IDLE bit to generate SCI receiver CPU
interrupt requests. Reset clears the ILIE bit.
Setting this read/write bit begins the transmission by sending a
preamble of 10 or 11 logic 1s from the transmit shift register to the
PE2/TxD pin. If software clears the TE bit, the transmitter completes
any transmission in progress before the PE2/TxD returns to the idle
For More Information On This Product,
1 = SCTE enabled to generate CPU interrupt
0 = SCTE not enabled to generate CPU interrupt
1 = TC enabled to generate CPU interrupt requests
0 = TC not enabled to generate CPU interrupt requests
1 = SCRF enabled to generate CPU interrupt
0 = SCRF not enabled to generate CPU interrupt
1 = IDLE enabled to generate CPU interrupt requests
0 = IDLE not enabled to generate CPU interrupt requests
Serial Communications Interface (SCI)
SCTIE
$0014
Bit 7
0
Figure 18-10. SCI Control Register 2 (SCC2)
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TCIE
6
0
SCRIE
5
0
ILIE
4
0
TE
3
0
MC68HC908GR8 — Rev 4.0
RE
2
0
RWU
1
0
MOTOROLA
Bit 0
SBK
0