MC68HRC908JK3CP Freescale Semiconductor, MC68HRC908JK3CP Datasheet - Page 115

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MC68HRC908JK3CP

Manufacturer Part Number
MC68HRC908JK3CP
Description
IC MCU FLASH 8B 8MHZ RC 4K 20DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HRC908JK3CP

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LED, LVD, POR, PWM
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HRC908JK3CP
Quantity:
6 250
Part Number:
MC68HRC908JK3CP
Manufacturer:
FREECAL
Quantity:
20 000
9.5 Security
MC68H(R)C908JL3
Freescale Semiconductor
NOTE:
Rev. 1.1
A security feature discourages unauthorized reading of FLASH locations
while in monitor mode. The host can bypass the security feature at
monitor mode entry by sending eight security bytes that match the bytes
at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-
defined data.
Do not leave locations $FFF6–$FFFD blank. For security reasons,
program locations $FFF6–$FFFD even if they are not used for vectors.
During monitor mode entry, the MCU waits after the power-on reset for
the host to send the eight security bytes on pin PTB0. If the received
bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all FLASH locations and execute code
from FLASH. Security remains bypassed until a power-on reset occurs.
If the reset was not a power-on reset, security remains bypassed and
security code entry is not required. (See
PTB0
V
RST
NOTES:
DD
1 = Echo delay, 2 bit times
2 = Data return delay, 2 bit times
4 = Wait 1 bit time before sending next byte.
FROM HOST
FROM MCU
Figure 9-7. Monitor Mode Entry Timing
Monitor ROM (MON)
4096 + 32 OSCXCLK CYCLES
24 BUS CYCLES
1
4
1
Figure
9-7.)
1
Monitor ROM (MON)
2
Technical Data
4
1
113

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