XC68HC705B32CB Freescale Semiconductor, XC68HC705B32CB Datasheet - Page 167

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XC68HC705B32CB

Manufacturer Part Number
XC68HC705B32CB
Description
IC MCU 2.1MHZ 32K OTP 56-DIP
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of XC68HC705B32CB

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SCI
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Eeprom Size
256 x 8
Ram Size
528 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
56-SDIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
C.2
The MC68HC705B5 has a total of 6206 bytes of EPROM, 256 bytes being reserved for the
EPROM1 array (see
array, making it possible to program it after the main EPROM has been programmed and
protected. The reset and interrupt vectors are located at $1FF2-$1FFF and the EPROM control
register described in
The EPROM array is supplied by the VPP6 pin in both read and programming modes. Typically
the user’s software will be loaded in a programming board where VPP6 is controlled by one of the
bootstrap loader routines (bootloader mode). It will then be placed in an application where no
programming occurs (user mode). In this case the VPP6 pin should be hardwired to V
An erased EPROM byte reads as $00.
Warning: A minimum V
C.2.1
The User program can be used to program some EPROM locations, provided the proper
procedure is followed. In particular, the programming sequence must be running in RAM, as the
EPROM will not be available for code execution while the ELAT bit is set. The VPP6 switching must
occur externally, after the EPGM bit is set, for example, under the control of a signal generated on
a pin by the programming routine.
Note:
To allow simultaneous programming of up to 4 bytes, they must be in the same group of addresses
which share the same most significant address bits; only the two LSBs can change.
MC68HC05B6
Rev. 4.1
power-on, as a lower voltage could damage the device. Unless otherwise stated,
EPROM programming is guaranteed at ambient (25°C) temperature only
Unless the part has a window for reprogramming, only the cumulative programming of
bits to logic 1 is possible if multiple programming is made on the same byte.
EPROM
EPROM programming operation
Figure
Section C.3.1
DD
C-2). The EPP bit (EPROM protect) is not operative on the EPROM1
voltage must be applied to the VPP6 pin at all times, including
is located at address $0007.
MC68HC705B5
DD
Freescale
.
C-5
14

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