XC68HC705B32CB Freescale Semiconductor, XC68HC705B32CB Datasheet - Page 47

• Manufacturer Part Number: XC68HC705B32CB
• Description: IC MCU 2.1MHZ 32K OTP 56-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of XC68HC705B32CB

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Eeprom Size: 256 x 8
• Ram Size: 528 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-SDIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.5.2
To be able to read from EEPROM, the E1LAT bit has to be at logic zero, as shown in
While this bit is at logic zero, the E1PGM bit and the E1ERA bit are permanently reset to zero and
the 256 bytes of EEPROM may be read as if it were a normal ROM area. The internal charge pump
generator is automatically switched off since the E1PGM bit is reset.
If a read operation is executed while the E1LAT bit is set (erase or programming sequence), data
resulting from the operation will be $FF.
Note:
3.5.3
To erase the contents of a byte of the EEPROM, the following steps should be taken:
While an erase operation is being performed, any access of the EEPROM array will not be
successful.
The erased state of the EEPROM is $FF and the programmed state is $00.
Note:
If a second word is to be erased, it is important that the E1LAT bit be reset before restarting the
erasing sequence otherwise any write to a new address will have no effect. This condition provides
a higher degree of security for the stored data.
User programs must be running from the RAM or ROM as the EEPROM will have its address and
data buses latched.
MC68HC05B6
Rev. 4.1
1 Set the E1LAT bit.
1) Set the E1ERA bit (1& 2 may be done simultaneously with the same
2) Write address/data to the EEPROM address to be erased.
3) Set the E1PGM bit.
4) Wait for a time t
5) Reset the E1LAT bit (to logic zero).
When not performing any programming or erase operation, it is recommended that
EEPROM should remain in the read mode (E1LAT = 0)
instruction).
Data written to the address to be erased is not used, therefore its value is not
significant.
EEPROM read operation
EEPROM erase operation
ERA1
.
MEMORY AND REGISTERS
Table
Freescale
3-1.
3-5
3