MC68HC908AP8CB Freescale Semiconductor, MC68HC908AP8CB Datasheet - Page 217

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MC68HC908AP8CB

Manufacturer Part Number
MC68HC908AP8CB
Description
IC MCU 8K FLASH 8MHZ 42SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908AP8CB

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
13.6 Queuing Transmission Data
The double-buffered transmit data register allows a data byte to be queued and transmitted. For an SPI
configured as a master, a queued data byte is transmitted immediately after the previous transmission
has completed. The SPI transmitter empty flag (SPTE) indicates when the transmit data buffer is ready
to accept new data. Write to the transmit data register only when the SPTE bit is high.
the timing associated with doing back-to-back transmissions with the SPI (SPSCK has CPHA: CPOL =
1:0).
Freescale Semiconductor
SPSCK CYCLE
CPHA = 1
CPHA = 0
NUMBER
CLOCK
CLOCK
CLOCK
CLOCK
CLOCK
SPSCK
SPSCK
MOSI
BUS
BUS
BUS
BUS
BUS
Figure 13-7. Transmission Start Delay (Master)
TO SPDR
TO SPDR
TO SPDR
WRITE
WRITE
WRITE
TO SPDR
TO SPDR
WRITE
WRITE
EARLIEST
EARLIEST
EARLIEST
EARLIEST
MC68HC908AP Family Data Sheet, Rev. 4
INITIATION DELAY FROM WRITE SPDR TO TRANSFER BEGIN
LATEST
SPSCK = INTERNAL CLOCK ÷ 128;
SPSCK = INTERNAL CLOCK ÷ 32;
SPSCK = INTERNAL CLOCK ÷ 8;
128 POSSIBLE START POINTS
32 POSSIBLE START POINTS
8 POSSIBLE START POINTS
SPSCK = INTERNAL CLOCK ÷ 2;
INITIATION DELAY
2 POSSIBLE START POINTS
MSB
1
BIT 6
2
LATEST
LATEST
LATEST
Queuing Transmission Data
BIT 5
3
Figure 13-8
shows
215

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