MC68HC908AP8CB Freescale Semiconductor, MC68HC908AP8CB Datasheet - Page 29
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MC68HC908AP8CB
Manufacturer Part Number
MC68HC908AP8CB
Description
IC MCU 8K FLASH 8MHZ 42SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AP8CFBE.pdf
(324 pages)
Specifications of MC68HC908AP8CB
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Chapter 2
Memory
2.1 Introduction
The CPU08 can address 64k-bytes of memory space. The memory map, shown in
2.2 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page area of $0000–$005F. Additional I/O
registers have these addresses:
2.3 Monitor ROM
The 959 bytes at addresses $FC00–$FDFF and $FE10–$FFCE are reserved ROM addresses that
contain the instructions for the monitor functions. (See
Freescale Semiconductor
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62,368 bytes of user FLASH — MC68HC908AP64
32,768 bytes of user FLASH — MC68HC908AP32
16,384 bytes of user FLASH — MC68HC908AP16
8,192 bytes of user FLASH — MC68HC908AP8
2,048 bytes of RAM — MC68HC908AP64 and MC68HC908AP32
1,024 bytes of RAM — MC68HC908AP16 and MC68HC908AP8
48 bytes of user-defined vectors
959 bytes of monitor ROM
$FE00; SIM break status register, SBSR
$FE01; SIM reset status register, SRSR
$FE02; Reserved
$FE03; SIM break flag control register, SBFCR
$FE04; interrupt status register 1, INT1
$FE05; interrupt status register 2, INT2
$FE06; interrupt status register 3, INT3
$FE07; Reserved
$FE08; FLASH control register, FLCR
$FE09; FLASH block protect register, FLBPR
$FE0A; Reserved
$FE0B; Reserved
$FE0C; Break address register high, BRKH
$FE0D; Break address register low, BRKL
$FE0E; Break status and control register, BRKSCR
$FE0F; LVI Status register, LVISR
$FFCF; Mask option register, MOR (FLASH register)
$FFFF; COP control register, COPCTL
MC68HC908AP Family Data Sheet, Rev. 4
Chapter 8 Monitor ROM
(MON).)
Figure
2-1, includes:
29
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