MC908SR12CFAE Freescale Semiconductor, MC908SR12CFAE Datasheet - Page 190
![IC MCU 12K FLASH 8MHZ 48-LQFP](/photos/12/45/124574/mc908sr12cfae_sml.jpg)
MC908SR12CFAE
Manufacturer Part Number
MC908SR12CFAE
Description
IC MCU 12K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908SR12MFAE.pdf
(404 pages)
Specifications of MC908SR12CFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, Temp Sensor
Number Of I /o
31
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Timer Interface Module (TIM)
11.5.4.1 Unbuffered PWM Signal Generation
Data Sheet
190
The value in the TIM counter modulo registers and the selected
prescaler output determines the frequency of the PWM output. The
frequency of an 8-bit PWM signal is variable in 256 increments. Writing
$00FF (255) to the TIM counter modulo registers produces a PWM
period of 256 times the internal bus clock period if the prescaler select
value is $000. See
The value in the TIM channel registers determines the pulse width of the
PWM output. The pulse width of an 8-bit PWM signal is variable in 256
increments. Writing $0080 (128) to the TIM channel registers produces
a duty cycle of 128/256 or 50%.
Any output compare channel can generate unbuffered PWM pulses as
described in
unbuffered because changing the pulse width requires writing the new
pulse width value over the old value currently in the TIM channel
registers.
An unsynchronized write to the TIM channel registers to change a pulse
width value could cause incorrect operation for up to two PWM periods.
For example, writing a new value before the counter reaches the old
value but after the counter reaches the new value prevents any compare
during that PWM period. Also, using a TIM overflow interrupt routine to
write a new, smaller pulse width value may cause the compare to be
missed. The TIM may pass the new value before it is written.
TCHx
OVERFLOW
Timer Interface Module (TIM)
11.5.4 Pulse Width Modulation
Figure 11-3. PWM Period and Pulse Width
PULSE
WIDTH
PERIOD
11.10.1 TIM Status and Control
COMPARE
OUTPUT
OVERFLOW
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
COMPARE
OUTPUT
(PWM). The pulses are
OVERFLOW
Freescale Semiconductor
Register.
COMPARE
OUTPUT
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