MCHLC908QY2CPE Freescale Semiconductor, MCHLC908QY2CPE Datasheet - Page 53

• Manufacturer Part Number: MCHLC908QY2CPE
• Description: IC MCU 1.5K FLASH 8MHZ 16-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHLC908QY2CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 2MHz
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Chapter 5
Configuration Register (CONFIG)
5.1 Introduction
This section describes the configuration registers (CONFIG1 and CONFIG2). The configuration registers
enable or disable the following options:
5.2 Functional Description
The configuration registers are used in the initialization of various options. The configuration registers can
be written once after each reset. Exceptions are bits LVDLVR and LVIRSTD which may be written at any
time. Most of the configuration register bits are cleared during reset. Since the various options affect the
operation of the microcontroller unit (MCU) it is recommended that this register be written immediately
after reset. The configuration registers are located at $001E and $001F, and may be read at anytime.
Freescale Semiconductor
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Stop mode recovery time (32 × BUSCLKX4 cycles or 4096 × BUSCLKX4 cycles)
STOP instruction
Computer operating properly module (COP)
COP reset period (COPRS): 8176 × BUSCLKX4 or 262,128 × BUSCLKX4
Low-voltage inhibit (LVI) enable and trip voltage selection
OSC option selection
IRQ pin
RST pin
Auto wakeup timeout period
Address: $001E
Reset:
Read:
Write:
POR:
IRQPUD
Bit 7
R
0
0
Figure 5-1. Configuration Register 2 (CONFIG2)
= Reserved
IRQEN
MC68HLC908QY/QT Family Data Sheet, Rev. 3
6
0
0
R
5
0
0
U = Unaffected
OSCOPT1
4
0
0
OSCOPT0
3
0
0
R
2
0
0
R
1
0
0
RSTEN
Bit 0
U
0
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