MPC564CVR40 Freescale Semiconductor, MPC564CVR40 Datasheet - Page 1169

• Manufacturer Part Number: MPC564CVR40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CVR40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

D.8
The COMM function generates phase commutation signals for a variety of brushless motors, including
three-phase brushless direct current motors. It derives the commutation state directly from the position
decoded in FQD, eliminating the need for hall effect sensors.
The state sequence is implemented as a user-configurable state machine, providing a flexible approach
with other general applications. A RCPU offset parameter is provided to allow the RCPU to advance or
retard all swtiching angles on the fly. This feature is useful for torque maintenance at high speeds. See
Freescale TPU Progamming Note Multiphase Motor Commutation TPU Function (COMM),
(TPUPN09/D).
Figure D-10
Freescale Semiconductor
Multiphase Motor Commutation (COMM)
and
Figure D-10
show all of the host interface areas for the COMM function.
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure D-9. NITC Parameters
CONTROL BITS
See
PRAM Address Offset Map.
Table 19-24
for the
TPU3 ROM Functions
D-17