M30263F6AFP#U7 Renesas Electronics America, M30263F6AFP#U7 Datasheet - Page 134
![IC M16C/26A MCU FLASH 42SSOP](/photos/28/61/286144/42-ssop_sml.jpg)
M30263F6AFP#U7
Manufacturer Part Number
M30263F6AFP#U7
Description
IC M16C/26A MCU FLASH 42SSOP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30263F6AFP#U7
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
33
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R
R
M
e
E
. v
J
1
Table 12.2.4.1 A/D Trigger Mode Specifications
0
6
12.2.4 A/D Trigger Mode
Count Source
Count Operation
Divide Ratio
Count Start Condition
Count Stop Condition
Interrupt Request
Generation Timing
TBiIN Pin Function
Read From Timer
Write To Timer
NOTES:
2
9
C
0 .
B
A/D trigger mode is used as conversion start trigger for A/D converter in simultaneous sample sweep
mode of A/D conversion or delayed trigger mode 0. This mode is used as conversion start trigger of A/D
converter. A/D trigger mode is used in Timer B0 and Timer B1. In this mode, the timer starts counting by
one trigger until the count value becomes 0000
trigger mode and figure 12.2.4.2 shows the TB2SC register.
2 /
0
0
1. A/D conversion is started by the timer underflow. For details refer to Section 14. A/D Converter.
2. When using in delayed trigger mode 0, set the larger value than the value of the timer B0 register
2
6
0
F
A
2
to the timer B1 register.
e
0 -
b
G
1 .
2
Item
o r
0
, 5
0
u
2
p
0
(
0
(2)
M
7
1
6
page 115
C
2 /
6
, A
f
• Down count
• When the timer underflows, reload register contents are reloaded before
• When a trigger is generated during the count operation, the count is not
When the TBiS (i=0,1) bit in the TABSR register is "1"(count started), TBiEN
(i=0,1) bit in TB2SC register is "1", and the following trigger is generated.
(Selection based on TB2SEL bit in the TB2SC register)
• Timer B2 overflow or underflow
• Underflow of Timer B2 interrupt generation frequency counter setting
• After the count value is 0000
• Set the TBiS bit to "0"(count stopped)
Timer underflows
I/O port
• When writing in the TBi register during count stopped.
• When writing in the TBi register during count.
M
Count value can be read by reading TBi register
1
stopping counting
affected
1/(n+1)
Value is written to both reload register and counter
Value is written to only reload register (Transfered to counter when reloaded next)
f o
, f
1
6
2
3
C
, f
2
9
2 /
8
, f
6
, B
32
, and f
n: Setting value of TBi register (i=0,1)
M
1
0000
6
C
C32
(1)
2 /
16
6
-FFFF
) T
16
. Figure 12.2.4.1 shows the TBiMR register in A/D
16
Specification
16
and reload register contents are reloaded
12. Timer
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