DF38122HWV Renesas Electronics America, DF38122HWV Datasheet - Page 365
DF38122HWV
Manufacturer Part Number
DF38122HWV
Description
IC H8/38122 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheet
1.US38024-BAG1.pdf
(684 pages)
Specifications of DF38122HWV
Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 365 of 684
- Download datasheet (5Mb)
Bit 7
TIE
0
1
Bit 6—Receive Interrupt Enable (RIE)
Bit 6 selects enabling or disabling of the receive data full interrupt request (RXI) and the receive
error interrupt request (ERI) when receive data is transferred from the receive shift register (RSR)
to the receive data register (RDR), and bit RDRF in the serial status register (SSR) is set to 1.
There are three kinds of receive error: overrun, framing, and parity.
RXI and ERI can be released by clearing bit RDRF or the FER, PER, or OER error flag to 0, or by
clearing bit RIE to 0.
Bit 6
RIE
0
1
Bit 5—Transmit Enable (TE)
Bit 5 selects enabling or disabling of the start of transmit operation.
Bit 5
TE
0
1
Notes: 1. Bit TDRE in SSR is fixed at 1.
2. When transmit data is written to TDR in this state, bit TDRE in SSR is cleared to 0 and
serial data transmission is started. Be sure to carry out serial mode register (SMR)
settings, and setting of bit SPC32 in SPCR, to decide the transmission format before
setting bit TE to 1.
Description
Transmit data empty interrupt request (TXI) disabled
Transmit data empty interrupt request (TXI) enabled
Description
Receive data full interrupt request (RXI) and receive error interrupt
request (ERI) disabled
Receive data full interrupt request (RXI) and receive error interrupt
request (ERI) enabled
Description
Transmit operation disabled *
Transmit operation enabled *
2
1
(TXD32 pin is transmit data pin)
(TXD32 pin is I/O port)
Section 10 Serial Communication Interface
Rev. 8.00 Mar. 09, 2010 Page 343 of 658
REJ09B0042-0800
(initial value)
(initial value)
(initial value)
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