DF38122HWV Renesas Electronics America, DF38122HWV Datasheet - Page 458
DF38122HWV
Manufacturer Part Number
DF38122HWV
Description
IC H8/38122 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheet
1.US38024-BAG1.pdf
(684 pages)
Specifications of DF38122HWV
Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 14 Power-On Reset and Low-Voltage Detection Circuits (H8/38124 Group Only)
Table 14.3 shows the relationship between LVDCR settings and function selections. Refer to table
14.3 when making settings to LVDCR.
Table 14.3 LVDCR Settings and Function Selections
LVDE
0
1
1
1
1
Note: Setting values marked with an asterisk (*) are invalid.
14.2.2
Note: * These bits initialized by resets trigged by LVDR.
LVDSR is an 8-bit read/write register. It is used to control external input selection, indicates when
the reference voltage is stable, and indicates if the power supply voltage goes below or above a
specified range.
Bit 7—LVD Reference Voltage Stabilized Flag (OVF)
This bit indicates when the low-voltage detection counter (LVDCNT) overflows.
Bit 7
OVF
0
1
Rev. 8.00 Mar. 09, 2010 Page 436 of 658
REJ09B0042-0800
Bit
Initial value
Read/Write
LVDSEL LVDRE LVDDE LVDUE
*
1
0
0
0
Low-Voltage Detection Status Register (LVDSR)
LVDCR Setting Value
Description
[Clearing condition]
When 0 is written after reading 1
[Setting condition]
When the low-voltage detection counter (LVDCNT) overflows
*
1
0
0
1
OVF
R/W
0 *
7
*
0
1
1
1
R/W
—
6
0
*
0
0
1
1
R/W
—
5
0
Power-on
Reset
R/W
—
4
0
Low-Voltage
Detection
Reset
—
—
—
VREFSEL
R/W
3
0
Low-Voltage
Detection
Voltage Drop
Interrupt
—
—
R/W
—
2
0
LVDDF
R/W
0 *
1
Low-Voltage
Detection
Voltage Rise
Interrupt
—
—
—
(initial value)
LVDUF
R/W
0 *
0
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