MAX6478BL33AD3+T Maxim Integrated Products, MAX6478BL33AD3+T Datasheet - Page 8

• Manufacturer Part Number: MAX6478BL33AD3+T
• Description: IC LDO REG 300MA 3.3V/ADJ 6-UCSP
• Manufacturer: Maxim Integrated Products

Specifications of MAX6478BL33AD3+T

• Regulator Topology: Positive Fixed or Adjustable
• Voltage - Output: 3.3V, 1.25 ~ 5.5 V
• Voltage - Input: 2.5 ~ 5.5 V
• Voltage - Dropout (typical): 0.114V @ 300mA, -
• Number Of Regulators: 1
• Current - Output: 300mA (Min)
• Current - Limit (min): 450mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 6-UCSP®
• Number Of Outputs: 1
• Polarity: Positive
• Input Voltage Max: 5.5 V
• Output Voltage: 1.2 V to 5 V, 3.3 V
• Output Type: Adjustable, Fixed
• Dropout Voltage (max): 0.032 V at 50 mA
• Output Current: 0.3 A
• Line Regulation: 0.09 % / V
• Load Regulation: 0.2 %
• Voltage Regulation Accuracy: 1.1 %
• Maximum Power Dissipation: 840 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Reference Voltage: 1.229 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
8
MAX6473/MAX6474
MAX6475/MAX6476
SOT23
SOT23
_______________________________________________________________________________________
—
—
1
2
3
4
5
6
1
2
3
4
5
6
PIN
PIN
TDFN-EP
TDFN-EP
1, 2
7, 8
1, 2
7, 8
—
—
3
4
5
6
3
4
5
6
MAX6481/MAX6482
MAX6483/MAX6484
MAX6473/MAX6474/MAX6481/MAX6482 Pin Description
MAX6475/MAX6476/MAX6483/MAX6484 Pin Description
BUMP
BUMP
UCSP
UCSP
A1
A2
A3
C3
C2
C1
A1
A2
A3
C3
C2
C1
—
—
RESET
RESET
NAME
NAME
SHDN
SHDN
GND
OUT
GND
OUT
MR
EP
FB
EP
IN
IN
Regulator Input. Bypass IN to GND with a 0.1µF capacitor.
Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
Active-Low Shutdown Input. Connect SHDN to V
Active-Low Reset Output. RESET remains low while V
reset threshold or while MR is held low. RESET remains low for the
duration of the reset timeout period after the reset conditions are
terminated. RESET is available in open-drain and push-pull
configurations.
Active-Low Manual Reset Input. The reset output is asserted while MR
is pulled low and remains asserted for the duration of the reset timeout
period after MR transitions from low to high. Leave MR unconnected or
connect to V
(typ) to V
Regulator Output. Bypass OUT to GND with a minimum 3.3µF (min)
low-ESR capacitor.
Exposed Paddle (TDFN Only). EP is internally connected to GND.
Connect EP to the ground plane to provide a low thermal-resistance
path from the IC junction to the PCB. Do not use as the electrical
connection to GND.
Regulator Input. Bypass IN to GND with a 0.1µF capacitor.
Ground. This pin also functions as a heatsink. Solder to large pads or
the circuit-board ground plane to maximize thermal dissipation.
Active-Low Shutdown Input. Connect SHDN to V
Active-Low Reset Output. RESET remains low while FB is below the
reset threshold. RESET remains low for the duration of the reset timeout
period after the reset conditions are terminated. RESET is available in
open-drain and push-pull configurations.
Feedback Input for Linear Regulator Controller or Remote Sense
Applications. Connect FB to the external load (V
output voltage.
Regulator Output. Bypass OUT to GND with a minimum 3.3µF low-ESR
capacitor.
Exposed Paddle (TDFN Only). EP is internally connected to GND.
Connect EP to the ground plane to provide a low thermal-resistance path
from the IC junction to the PCB. Do not use as the electrical connection
to GND.
OUT
OUT
.
if not used. MR has an internal pullup resistor of 40kΩ
FUNCTION
FUNCTION
CC
IN
IN
for normal operation.
) to obtain the fixed
for normal operation.
OUT
is below the