ATMEGA8515L-8JU Atmel, ATMEGA8515L-8JU Datasheet - Page 180

• Manufacturer Part Number: ATMEGA8515L-8JU
• Description: MCU AVR 8K ISP FLASH MEM 44-PLCC
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8515L-8JU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LCC (J-Lead)
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 35
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Fuse bits
180
ATmega8515(L)
Table 82. Lock Bit Protection Modes
Notes:
The ATmega8515 has two Fuse bytes. Table 83 and Table 84 describe briefly the func-
tionality of all the fuses and how they are mapped into the fuse bytes. Note that the
Fuses are read as logical zero, “0”, if they are programmed.
Table 83. Fuse High Byte
Notes:
Fuse High Byte
S8515C
WDTON
SPIEN
CKOPT
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
1
2
3
4
(1)(2)
Memory Lock bits
1. Program the Fuse bits before programming the Lock bits.
2. “1” means unprogrammed, “0” means programmed
1. See “AT90S4414/8515 Compatibility Mode” on page 4 for details.
2. The SPIEN Fuse is not accessible in serial programming mode.
3. The CKOPT Fuse functionality depends on the setting of the CKSEL bits. See “Clock
4. The default value of BOOTSZ1..0 results in maximum Boot Size. See Table 78 on
(3)
Sources” on page 35. for details.
page 177.
1
1
0
0
Bit no
7
6
5
4
3
2
1
0
1
0
0
1
Description
AT90S4414/8515 compatibility
mode
Watchdog Timer always on
Enable Serial Program and Data
Downloading
Oscillator options
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see Table 78 for
details)
Select Boot Size (see Table 78 for
details)
Select Reset Vector
Protection Type
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section,
and LPM executing from the Application section is not
allowed to read from the Boot Loader section. If Interrupt
Vectors are placed in the Application section, interrupts
are disabled while executing from the Boot Loader section.
LPM executing from the Application section is not allowed
to read from the Boot Loader section. If Interrupt Vectors
are placed in the Application section, interrupts are
disabled while executing from the Boot Loader section.
(2)
(Continued)
1 (unprogrammed)
1 (unprogrammed)
Default Value
1 (unprogrammed)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed,
EEPROM not preserved)
0 (programmed)
0 (programmed)
2512K–AVR–01/10
(4)
(4)