ATMEGA8515L-8JU Atmel, ATMEGA8515L-8JU Datasheet - Page 47

MCU AVR 8K ISP FLASH MEM 44-PLCC

ATMEGA8515L-8JU

Manufacturer Part Number
ATMEGA8515L-8JU
Description
MCU AVR 8K ISP FLASH MEM 44-PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8515L-8JU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LCC (J-Lead)
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
35
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
512Byte
# I/os (max)
35
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details

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Power-on Reset
2512K–AVR–01/10
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detec-
tion level is defined in Table 18. The POR is activated whenever V
detection level. The POR circuit can be used to trigger the Start-up Reset, as well as to
detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reach-
ing the Power-on Reset threshold voltage invokes the delay counter, which determines
how long the device is kept in RESET after V
again, without any delay, when V
Figure 23. MCU Start-up, RESET Tied to V
Figure 24. MCU Start-up, RESET Extended Externally
INTERNAL
TIME-OUT
INTERNAL
TIME-OUT
RESET
RESET
RESET
RESET
V
V
CC
CC
V
V
V
POT
RST
POT
t
TOUT
CC
decreases below the detection level.
V
RST
CC
t
TOUT
CC
rise. The RESET signal is activated
ATmega8515(L)
CC
is below the
47

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