AT91SAM7S128C-AU Atmel, AT91SAM7S128C-AU Datasheet - Page 431

• Manufacturer Part Number: AT91SAM7S128C-AU
• Description: IC ARM7 MCU 32BIT 128K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S128C-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: AT91SAM7S128-AU-001; AT91SAM7S128AU001; AT91SAM7S128AU001

• FSOS: Transmit Frame Sync Output Selection
• FSDEN: Frame Sync Data Enable
0 = The TD line is driven with the default value during the Transmit Frame Sync signal.
1 = SSC_TSHR value is shifted out during the transmission of the Transmit Frame Sync signal.
• FSEDGE: Frame Sync Edge Detection
Determines which edge on frame sync will generate the interrupt TXSYN (Status Register).
6175K–ATARM–30-Aug-10
FSEDGE
0x6-0x7
FSOS
0x0
0x1
0x2
0x3
0x4
0x5
0x0
0x1
Selected Transmit Frame Sync Signal
None
Negative Pulse
Positive Pulse
Driven Low during data transfer
Driven High during data transfer
Toggling at each start of data transfer
Reserved
Frame Sync Edge Detection
Positive Edge Detection
Negative Edge Detection
AT91SAM7S Series Preliminary
Undefined
Input-only
TF Pin
Output
Output
Output
Output
Output
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