AT91SAM7S128C-AU Atmel, AT91SAM7S128C-AU Datasheet - Page 464

• Manufacturer Part Number: AT91SAM7S128C-AU
• Description: IC ARM7 MCU 32BIT 128K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S128C-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: AT91SAM7S128-AU-001; AT91SAM7S128AU001; AT91SAM7S128AU001

• LDBDIS: Counter Clock Disable with RB Loading
0 = Counter clock is not disabled when RB loading occurs.
1 = Counter clock is disabled when RB loading occurs.
• ETRGEDG: External Trigger Edge Selection
• ABETRG: TIOA or TIOB External Trigger Selection
0 = TIOB is used as an external trigger.
1 = TIOA is used as an external trigger.
• CPCTRG: RC Compare Trigger Enable
0 = RC Compare has no effect on the counter and its clock.
1 = RC Compare resets the counter and starts the counter clock.
• WAVE
0 = Capture Mode is enabled.
1 = Capture Mode is disabled (Waveform Mode is enabled).
• LDRA: RA Loading Selection
• LDRB: RB Loading Selection
464
0
0
1
1
0
0
1
1
0
0
1
1
AT91SAM7S Series Preliminary
ETRGEDG
LDRB
LDRA
0
1
0
1
0
1
0
1
0
1
0
1
Edge
none
rising edge of TIOA
falling edge of TIOA
each edge of TIOA
Edge
none
rising edge of TIOA
falling edge of TIOA
each edge of TIOA
none
rising edge
falling edge
each edge
Edge
6175K–ATARM–30-Aug-10