MC9S08DZ96MLF Freescale Semiconductor, MC9S08DZ96MLF Datasheet - Page 173

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MC9S08DZ96MLF

Manufacturer Part Number
MC9S08DZ96MLF
Description
MCU 8BIT 96K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08DZ96MLF

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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8.3.3
Freescale Semiconductor
1
Field
TRIM
7:0
A value for TRIM is loaded during reset from a factory programmed location when not in any BDM mode. If in a BDM
mode, a default value of 0x80 is loaded.
W
R
MCG Trim Register (MCGTRM)
MCG Trim Setting — Controls the internal reference clock frequency by controlling the internal reference clock
period. The TRIM bits are binary weighted (i.e., bit 1 will adjust twice as much as bit 0). Increasing the binary
value in TRIM will increase the period, and decreasing the value will decrease the period.
An additional fine trim bit is available in MCGSC as the FTRIM bit.
If a TRIM[7:0] value stored in nonvolatile memory is to be used, it’s the user’s responsibility to copy that value
from the nonvolatile memory location to this register.
7
Table 8-5. MCG Trim Register Field Descriptions
6
Figure 8-5. MCG Trim Register (MCGTRM)
MC9S08DZ128 Series Data Sheet, Rev. 1
5
4
Description
TRIM
1
Chapter 8 Multi-Purpose Clock Generator (S08MCGV2)
3
2
1
0
173

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