MC9S08DZ96MLF Freescale Semiconductor, MC9S08DZ96MLF Datasheet - Page 78

• Manufacturer Part Number: MC9S08DZ96MLF
• Description: MCU 8BIT 96K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08DZ96MLF

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 4 Memory
Table 4-14
4.6.11.2
During reset, the contents of the nonvolatile location NVOPT are copied from FLASH into FOPT. To
change the value in this register, erase and reprogram the NVOPT location in FLASH memory as usual
and then issue a new MCU reset.
78
FNORED
Reset
KEYEN
Field
7
6
W
R
KEYEN
shows the appropriate values for PRDIV8 and DIV for selected bus frequencies.
Backdoor Key Mechanism Enable — When this bit is 0, the backdoor key mechanism cannot be used to
disengage security. The backdoor key mechanism is accessible only from user (secured) firmware. BDM
commands cannot be used to write key comparison values that would unlock the backdoor key. For more detailed
information about the backdoor key mechanism, refer to
0 No backdoor key access allowed.
1 If user firmware writes an 8-byte value that matches the nonvolatile backdoor key (NVBACKKEY through
Vector Redirection Disable — When this bit is 1, vector redirection is disabled.
0 Vector redirection enabled.
1 Vector redirection disabled.
FLASH and EEPROM Options Register (FOPT and NVOPT)
F
7
200 kHz
150 kHz
NVBACKKEY+7 in that order), security is temporarily disengaged until the next MCU reset.
20 MHz
10 MHz
8 MHz
4 MHz
2 MHz
1 MHz
f
Bus
= Unimplemented or Reserved
FNORED
Figure 4-15. FLASH and EEPROM Options Register (FOPT)
(Binary)
Table 4-14. FLASH and EEPROM Clock Divider Settings
PRDIV8
F
6
if PRDIV8 = 1 — f
1
0
0
0
0
0
0
0
if PRDIV8 = 0 — f
Table 4-15. FOPT Register Field Descriptions
EPGMOD
MC9S08DZ128 Series Data Sheet, Rev. 1
(Decimal)
F
5
DIV
12
49
39
19
9
4
0
0
FCLK
FCLK
= f
0
0
4
192.3 kHz
= f
Bus
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
200 kHz
150 kHz
f
FCLK
Description
Bus
÷ (8 × (DIV + 1))
÷ (DIV + 1)
Section 4.6.9,
3
0
0
Program/Erase Timing Pulse
(5 μs Min, 6.7 μs Max)
“Security.”
5.2 μs
6.7 μs
5 μs
5 μs
5 μs
5 μs
5 μs
5 μs
0
0
2
Freescale Semiconductor
F
1
SEC
Eqn. 4-1
Eqn. 4-2
F
0