MCF5328CVM240 Freescale Semiconductor, MCF5328CVM240 Datasheet - Page 48

• Manufacturer Part Number: MCF5328CVM240
• Description: IC MCU 32BIT 240MHZ 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF532xr

Specifications of MCF5328CVM240

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSI, UART/USART, USB, USB OTG
• Peripherals: DMA, LCD, PWM, WDT
• Number Of I /o: 94
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Program Memory Size: 16KB
• Cpu Speed: 240MHz
• Embedded Interface Type: CAN, I2C, MAC, Ethernet, QSPI, UART
• Rohs Compliant: Yes
• Family Name: MPC5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 240MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.6/1.95/2.75/3.6V
• Operating Supply Voltage (min): 1.4/1.7/2.25/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Revision History
48
Rev. No.
4
5
Table 33. MCF5329DS Document Revision History (continued)
Changed the following specs in
• Corrected pinouts in Signal Information and Pin-Muxing table for
• Corrected D0 spec in
• Updated FlexBus read and write timing diagrams in
• Removed footnote 2 from the IRQ[7:1] alternate functions USBHOST
• Updated pinouts for 196 MAPBGA device, MCF5327CVM240 in both
• Minimum frequency of operation from TBD to 60MHz
• Maximum clock period from TBD to 16.67 ns
196 MAPBGA device:
Changed D[15:1] entry from “F4–F1, G4–G2...” to “F4–F1, G5–G2...”
Changed DSO/TDO entry from “P9” to “N9”
max balues.
Figure
VBUS_EN, USBHOST VBUS_OC, SSI_MCLK, USB_CLKIN, and
SSI_CLKIN signals in Signal Information and Pin-Muxing table.
Figure 5
The following locations are affected: G10–12, H12–14, J11–14,
K12–13, L12–13, M12–14, N13.
The following signals are affected: USBOTG_VDD, USBHOST_VSS,
USBOTG_M, USBOTG_P, USBHOST_M, USBHOST_P, DRAMSEL,
PWM3, PWM1, IRQ[7,4,3,2,1], RESET, TDI/DSI, JTAG_EN,
TMS/BKPT.
MCF532x ColdFire
8.
and
Table
2.
Substantive Changes
Table 30
®
Microprocessor Data Sheet, Rev. 5
Table 10
from 1.5 x t
and
sys
Table
to 2 x t
11:
Figure 7
sys
for min and
and
Date of Release
Freescale Semiconductor
11/2008
4/2008