ATA555812C-DDB Atmel, ATA555812C-DDB Datasheet - Page 2
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ATA555812C-DDB
Manufacturer Part Number
ATA555812C-DDB
Description
IC IDIC 1KBIT R/W DIE
Manufacturer
Atmel
Datasheet
1.ATA555812C-DDB.pdf
(52 pages)
Specifications of ATA555812C-DDB
Function
Read/Write
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2. Functional Blocks
2.1
2
Analog Front End
ATA5558
The ATA5558 receives commands from the interrogator (downlink) as a 1 out of 4 pulse interval
encoded, amplitude modulated signal. Return data transmission from the tag to the interrogator
(uplink) utilizes either Manchester, Bi-phase or NRZ encoded amplitude modulation. This is
achieved by controlled damping of the interrogator’s RF field with an on-chip resistive load
between the two tag terminals, Coil 1 and Coil 2. Multi-Tag identification is implemented using a
deterministic anticollision algorithm which requires unique tag identification information (Tag
ID’s). Three blocks within the system memory are reserved for storage of the Tag ID, the length
of which is user configurable up to a maximum of 96 bits.
Figure 1-2.
The analog front end (AFE) includes all circuitry directly associated with the coil interface. It gen-
erates the internal power supply and handles the data communication with the interrogator. It
consists of the following blocks:
• Rectifier to generate a DC supply voltage from the AC coil voltage
• Low-voltage regulator to provide an on-chip stabilized DC voltage
• Charge pump to generate the high voltage required for EEPROM programming
• On-chip tuning capacitor (mask option)
• Field clock extractor
• Field gap detector for data transmission from interrogator to tag
• Load switching between Coil 1/Coil 2 for data transmission from tag to interrogator
• Electrostatic discharge protection (ESD)
Coil 1
Coil 2
System Block Diagram
* mask option
POR
HV generator
Modulator
Anticollision logic
Mode register
Controller
(1 kbit EEPROM)
System memory
Input register
User memory
4681E–RFID–11/09