ATA555812C-DDB Atmel, ATA555812C-DDB Datasheet - Page 4
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATA555812C-DDB
Manufacturer Part Number
ATA555812C-DDB
Description
IC IDIC 1KBIT R/W DIE
Manufacturer
Atmel
Datasheet
1.ATA555812C-DDB.pdf
(52 pages)
Specifications of ATA555812C-DDB
Function
Read/Write
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2.5
2.6
2.6.1
4
Binary Bit Rate Generator
Memory Section
ATA5558
Memory Map
Figure 2-2.
The tag’s data rate is binary programmable in the configuration register to operate at any bit rate
between RF/2 and RF/64.
The physical memory is subdivided into two logical sections (see
memory section contains the 1024 bits of user data. The second logical memory section con-
tains 320 bits of system/configuration data. Both memories are organized in 32-bit data blocks,
each block being equipped with a single lock bit, with which the associated block can be write
protected. Command controlled programming and reading always takes place on a serial MSB
first block basis so that a block constitutes the smallest directly accessible data unit. The user
memory is further subdivided into 8 pages, each of 4 blocks in size. This provides the basis of
the page security scheme
Figure 2-3.
Data rate
NRZ data stream
Biphase coded
Modulator signal
Bi-phase coded
RF field
31
30
31
29
28
27
4
3
2
1
0
:
7
6
5
=
L
L
L
L
L
L
L
L
L
L
L
L
L
:
L
-------------------- -
2 n
31 30 29
RF
Bi-phase Timing Diagram
Memory Map Structure
+
Data rate = F
User data block31/page7
User data block30/page7
User data block29/page7
User data block28/page7
User data block27/page6
1
User data block7/page1
User data block6/page1
User data block5/page1
User data block4/page1
User data block3/page0
User data block2/page0
User data block1/page0
User data block0/page0
User memory
bit position
1
(“Password Protection” on page
:
RF
/8
0
2
1
0
0
1Fh
1Eh
1Dh
1Ch
1Bh
07h
06h
05h
04h
03h
02h
01h
00h
63
62
61
60
59
58
57
56
55
54 L
1
L
L
L
L
L
L
L
L
L
L
31
30 29
6).
Password/Page Security
1
System memory
Lock bits
Password - Write
Password - Read
Traceability 3
Traceability 2
Traceability 1
Configuration
bit position
Tag ID 3
Tag ID 2
Tag ID 1
Figure
1
2-3). The first logical
0
2
4681E–RFID–11/09
1
0
3Dh
3Ch
3Fh
3Eh
3Bh
3Ah
39h
38h
37h
36h
1