ATA555812C-DDB Atmel, ATA555812C-DDB Datasheet - Page 24
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ATA555812C-DDB
Manufacturer Part Number
ATA555812C-DDB
Description
IC IDIC 1KBIT R/W DIE
Manufacturer
Atmel
Datasheet
1.ATA555812C-DDB.pdf
(52 pages)
Specifications of ATA555812C-DDB
Function
Read/Write
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 6-1.
7. Command Set
Table 7-1.
24
Parameter
Tag reaction time
Tag to Interrogator response
time
Anticollision Aknowledge
response time
Anticollision final zero bit
response time
Command
Read Single Block
Read Multiple Blocks
Write Single Block
Login Write
Login Read
GetID
GetID (Tag ID-part, even)
GetID (Tag ID-part, odd)
Select (Tag ID)
SelectAll
SelectGroup
SelectNGroup
ResetSelected
ResetToReady
ArmClear
ClearAll
ATA5558
Anti-collision Timing
List of ATA5558 Supported Commands
The first two bits of any interrogator command are called Start Of Command (SOC) and are
always 00. This pulse interval is used for auto calibration purposes. The following series of dual
bit packets define the interrogator command opcodes and the command dependant parameter
information. A command overview is given in
SOC
Remark
End of start gap to start of tag
command processing
End of final command gap to
start of Tag SOF
End of Interrogator acknowledge
gap to start of Tag SOF
Overlap of final zero bit and SOF
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
01 11 01 11 10
01 11 01 10 10
11 10 00 00
11 00 00 00
11 00 10 00
01 01 11 11
10 0[0]n 1
10 1[0]n 1
Opcode
00 00
00 00
00 00
10 00
00 1
01
01
01
Number of Parameter bits
Length of partial Tag ID
Length of partial Tag ID
Length of Tag ID mask
Length of Tag ID mask
34
12 (+ 16 CRC_d)
40 (+ 16 CRC_d)
Length of Tag ID
6 (+ 16 CRC_d)
Symbol
0 (+ 16 CRC_d)
T
T
T
T
Tag
ack
IR
0
None
None
None
None
6
32
32
0
(See
Formular
DDR = 1
DDR = 0
½
Table 7-1
d
Table 3-1 on page
11
T
max + 65
bit
Description
Read single 32 bit data block and CRC_u
(+ optional downlink CRC_d)
Read multiple data blocks and CRC_u
(+ optional downlink CRC_d)
Write a single block
(+ optional downlink CRC_d)
Login for write PWD protected access
Login for read PWD protected access
Starts a complete new anticollision loop
Anticollision loop with partial Tag ID, with
even number of matching Tag ID bits.
Anticollision loop with partial Tag ID, with odd
number of matching Tag ID bits.
Puts specified tag into Selected state
Selects all tags in the RF field
Select a specific group of tags
Select all tags which are NOT members of
the specified group
Reset selected tag to READY state without
reloading configuration register
Reset all tags in the RF field to READY state
and reload configuration register from system
memory (block #63)
Arms tag for ClearAll command
Clears memory except traceability data
(with optional constant CRC_d = 96ADh)
below
Formular
134
138
½
T
c
T
T
T
bit
12)
c
c
T
bit
DDR = 1
DDR = 0
= 32 / f
Example:
134
138
16
c
0
, d
4681E–RFID–11/09
ref
T
T
T
T
c
117
145
= 24
c
c
c
T
T
T
c
c
c