ATMEGA256RZAV-8AU Atmel, ATMEGA256RZAV-8AU Datasheet - Page 24

• Manufacturer Part Number: ATMEGA256RZAV-8AU
• Description: MCU ATMEGA2561/AT86RF230 64-TQFP
• Manufacturer: Atmel
• Series: ATMEGAr

Specifications of ATMEGA256RZAV-8AU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: ISM, ZigBee™
• Power - Output: 3dBm
• Sensitivity: -101dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 15.5mA
• Current - Transmitting: 16.5mA
• Data Interface: PCB, Surface Mount
• Memory Size: 256kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 64-TQFP
• Wireless Frequency: 2.4 GHz
• Interface Type: JTAG, SPI
• Output Power: 3 dBm
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Data Rate - Maximum: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: ATmega256

7.3.1
2549M–AVR–09/10
EEPROM Read/Write Access
The EEPROM Access Registers are accessible in the I/O space, see
page
The write access time for the EEPROM is given in
lets the user software detect when the next byte can be written. If the user code contains instruc-
tions that write the EEPROM, some precautions must be taken. In heavily filtered power
supplies, V
period of time to run at a voltage lower than specified as minimum for the clock frequency used.
See “Preventing EEPROM Corruption” on page 26.
situations.
In order to prevent unintentional EEPROM writes, a specific write procedure must be followed.
See the description of the EEPROM Control Register for details on this,
on page
When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is
executed. When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed.
The calibrated Oscillator is used to time the EEPROM accesses.
gramming time for EEPROM access from the CPU.
Table 7-1.
The following code examples show one assembly and one C function for writing to the
EEPROM. The examples assume that interrupts are controlled (for example by disabling inter-
rupts globally) so that no interrupts will occur during execution of these functions. The examples
also assume that no Flash Boot Loader is present in the software. If such code is present, the
EEPROM write function must also wait for any ongoing SPM command to finish.
Symbol
EEPROM write
(from CPU)
35.
35.
CC
is likely to rise or fall slowly on power-up/down. This causes the device for some
EEPROM Programming Time
Number of Calibrated RC Oscillator Cycles
ATmega640/1280/1281/2560/2561
26,368
for details on how to avoid problems in these
Table
7-1. A self-timing function, however,
Table 7-1
“Register Description” on
Typ Programming Time
“Register Description”
lists the typical pro-
3.3 ms
24