SI4431-B1-FM Silicon Laboratories Inc, SI4431-B1-FM Datasheet - Page 71

IC TXRX 240-930MHZ -8-13DB 20QFN

SI4431-B1-FM

Manufacturer Part Number
SI4431-B1-FM
Description
IC TXRX 240-930MHZ -8-13DB 20QFN
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI4431-B1-FM

Package / Case
20-VQFN
Mfg Application Notes
Transitioning SI4430/31 to Rev B
Frequency
240MHz ~ 930MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
General Purpose
Power - Output
13dBm
Sensitivity
-121dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
30mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Wireless Frequency
240 MHz to 930 MHz
Output Power
13 dBm
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
30 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4mm
Product Length (mm)
4mm
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI4431-B1-FMR
Manufacturer:
TE
Quantity:
2 000
Part Number:
SI4431-B1-FMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
SI4431-B1-FMR
0
Notes: General
Note: Solder Mask Design
Notes: Stencil Design
Notes: Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on IPC-7351 guidelines.
1. All metal pads are to be non-solder mask defined (NSMD). Clearance
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for the
4. A 2x2 array of 1.10 x 1.10 mm openings on 1.30 mm pitch should be
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
between the solder mask and the metal pad is to be 60 µm minimum, all
the way around the pad.
walls should be used to assure good solder paste release.
perimeter pads.
used for the center ground pad.
specification for small body components.
Symbol
C1
C2
X1
X2
Y1
Y2
E
Table 20. PCB Land Pattern Dimensions
Rev 1.1
3.90
3.90
0.20
2.65
0.65
2.65
Min
Millimeters
0.50 REF
Si4430/31/32-B1
Max
4.00
4.00
0.30
2.75
0.75
2.75
71

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