XC3S50AN-4TQ144I Xilinx Inc, XC3S50AN-4TQ144I Datasheet - Page 17

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XC3S50AN-4TQ144I

Manufacturer Part Number
XC3S50AN-4TQ144I
Description
IC FPGA SPARTAN 3AN 144TQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheet

Specifications of XC3S50AN-4TQ144I

Number Of Logic Elements/cells
1584
Number Of Labs/clbs
176
Total Ram Bits
55296
Number Of I /o
108
Number Of Gates
50000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Quantity
Price
Part Number:
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Manufacturer:
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Single-Ended I/O Standards
Table 13: Recommended Operating Conditions for User I/Os Using Single-Ended Standards
DS557 (v4.1) April 1, 2011
Product Specification
Notes:
1.
2.
3.
4.
5.
6.
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33_3
PCI66_3
HSTL_I
HSTL_III
HSTL_I_18
HSTL_II_18
HSTL_III_18
SSTL18_I
SSTL18_II
SSTL2_I
SSTL2_II
SSTL3_I
SSTL3_II
IOSTANDARD
Descriptions of the symbols used in this table are as follows:
V
V
V
V
In general, the V
For device operation, the maximum signal voltage (V
There is approximately 100 mV of hysteresis on inputs using LVCMOS33 and LVCMOS25 I/O standards.
All Dedicated pins (PROG_B, DONE, SUSPEND, TCK, TDI, TDO, and TMS) draw power from the V
standard. The Dual-Purpose configuration pins use the LVCMOS standard before the User mode. When using these pins as part of a
standard 2.5V configuration interface, apply 2.5V to the V
For information on PCI IP solutions, see www.xilinx.com/pci. The PCI IOSTANDARD is not supported on input-only pins. The PCIX
IOSTANDARD is available and has equivalent characteristics but no PCI-X IP is supported.
CCO
REF
IL
IH
Attribute
– the input voltage that indicates a Low logic level
– the input voltage that indicates a High logic level
(6)
(6)
– the reference voltage for setting the input switching threshold
– the supply voltage for output drivers
(4)
(4)(5)
CCO
rails supply only output drivers, not input circuits. The exceptions are for LVCMOS25 inputs and for PCI™ I/O standards.
Min (V)
1.65
3.0
3.0
2.3
1.4
1.1
3.0
3.0
1.4
1.4
1.7
1.7
1.7
1.7
1.7
2.3
2.3
3.0
3.0
V
CCO
Nom (V)
for Drivers
3.3
3.3
2.5
1.8
1.5
1.2
3.3
3.3
1.5
1.5
1.8
1.8
1.8
1.8
1.8
2.5
2.5
3.3
3.3
(2)
Max (V)
1.95
3.6
3.6
2.7
1.6
1.3
3.6
3.6
1.6
1.6
1.9
1.9
1.9
1.9
1.9
2.7
2.7
3.6
3.6
IH
max) can be as high as V
CCO
www.xilinx.com
Spartan-3AN FPGA Family: DC and Switching Characteristics
lines of Banks 0, 1, and 2 at power-on as well as throughout configuration.
Min (V)
0.833
0.833
0.68
1.13
1.13
0.8
1.3
1.3
V
these I/O standards
REF
Nom (V)
is not used for
0.900
0.900
V
0.75
1.25
1.25
0.9
0.9
0.9
1.1
1.5
1.5
REF
IN
max. See
Max (V)
0.969
0.969
1.38
1.38
0.9
1.1
1.7
1.7
Table
6.
CCAUX
V
V
V
V
0.3  V
0.3  V
V
V
V
V
V
V
V
REF
REF
REF
REF
Max (V)
REF
REF
REF
REF
REF
REF
REF
rail and use the LVCMOS33
V
0.8
0.8
0.7
0.4
0.4
0.4
– 0.125
– 0.125
– 0.150
– 0.150
IL
– 0.1
– 0.1
– 0.1
– 0.1
– 0.1
– 0.2
– 0.2
CCO
CCO
V
V
V
V
0.5  V
0.5  V
V
V
V
V
V
V
V
REF
REF
REF
REF
Min (V)
REF
REF
REF
REF
REF
REF
REF
V
2.0
2.0
1.7
0.8
0.8
0.7
IH
+ 0.125
+ 0.125
+ 0.150
+ 0.150
+ 0.1
+ 0.1
+ 0.1
+ 0.1
+ 0.1
+ 0.2
+ 0.2
(3)
CCO
CCO
17

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