XC3S50AN-4TQ144I Xilinx Inc, XC3S50AN-4TQ144I Datasheet - Page 5

• Manufacturer Part Number: XC3S50AN-4TQ144I
• Description: IC FPGA SPARTAN 3AN 144TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S50AN-4TQ144I

• Number Of Logic Elements/cells: 1584
• Number Of Labs/clbs: 176
• Total Ram Bits: 55296
• Number Of I /o: 108
• Number Of Gates: 50000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

•
•
•
•
•
Table 4: Available User I/Os and Differential (Diff) I/O Pairs
DS557 (v4.1) April 1, 2011
Product Specification
Notes:
1.
2.
3.
4.
Device
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
Sector-based data protection and security features
•
•
128-byte Security Register
•
•
•
100,000 Program/Erase cycles
20-year data retention
Comprehensive programming support
•
•
•
See
The footprint for the TQ(G)144 (22 mm x 22 mm) package is larger than the package body.
Each Spartan-3AN FPGA has a pin-compatible Spartan-3A FPGA equivalent, although Spartan-3A FPGAs do not have internal SPI flash
and offer more part/package combinations.
The number shown in bold indicates the maximum number of I/O and input-only pins. The number shown in (italics) indicates the number
of input-only pins. The differential (Diff) input-only pin count includes both differential pairs on input-only pins and differential pairs on I/O pins
within I/O banks that are restricted to differential inputs.
Body Size (mm)
(3)
Sector Protect: Write- and erase-protect a sector
(changeable)
Sector Lockdown: Sector data is unchangeable
(permanent)
Separate from FPGA’s unique Device DNA
identifier
64-byte factory-programmed identifier unique to
the in-system Flash memory
64-byte one-time programmable,
user-programmable field
In-system prototype programming via JTAG using
Xilinx
Product programming support using BPM
Microsystems programmers with appropriate
programming adapter
Design examples demonstrating in-system
programming from a Spartan-3AN FPGA
application
Pb and Pb-Free Packaging, page 7
Package
Platform Cable USB
(1)
108
User
(7)
–
–
–
–
20 x 20
(4)
TQG144
TQ144
and iMPACT software
(2)
Diff
(24)
50
–
–
–
–
for details on Pb and Pb-free packaging options.
User
(32)
(35)
(35)
144
195
195
–
–
FTG256
17 x 17
FT256
Spartan-3AN FPGA Family: Introduction and Ordering Information
www.xilinx.com
(32)
(50)
(50)
Diff
64
90
90
–
–
I/O Capabilities
The Spartan-3AN FPGA SelectIO interface supports many
popular single-ended and differential standards.
shows the number of user I/Os as well as the number of
differential I/O pairs available for each device/package
combination. Some of the user I/Os are unidirectional,
input-only pins as indicated in
Spartan-3AN FPGAs support the following single-ended
standards:
•
•
•
•
•
Spartan-3AN FPGAs support the following differential
standards:
•
•
•
•
•
User
(63)
311
3.3V low-voltage TTL (LVTTL)
Low-voltage CMOS (LVCMOS) at 3.3V, 2.5V, 1.8V,
1.5V, or 1.2V
3.3V PCI at 33 MHz or 66 MHz
HSTL I, II, and III at 1.5V and 1.8V, commonly used in
memory applications
SSTL I and II at 1.8V, 2.5V, and 3.3V, commonly used
for memory applications
LVDS, mini-LVDS, RSDS, and PPDS I/O at 2.5V or
3.3V
Bus LVDS I/O at 2.5V
TMDS I/O at 3.3V
Differential HSTL and SSTL I/O
LVPECL inputs at 2.5V or 3.3V
–
–
–
–
FGG400
21 x 21
FG400
(78)
Diff
142
–
–
–
–
User
(84)
(87)
372
375
–
–
–
FGG484
23 x 23
FG484
Table
Diff
165
(93)
165
(93)
–
–
–
4.
User
(94)
502
–
–
–
–
FGG676
27 x 27
FG676
Table 4
(131)
Diff
227
–
–
–
–
5