UJA1061TW/5V0/C/T, NXP Semiconductors, UJA1061TW/5V0/C/T, Datasheet - Page 24

no-image

UJA1061TW/5V0/C/T,

Manufacturer Part Number
UJA1061TW/5V0/C/T,
Description
IC CAN/LIN FAIL-SAFE HS 32HTSSOP
Manufacturer
NXP Semiconductors
Datasheets

Specifications of UJA1061TW/5V0/C/T,

Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Applications
Automotive Networking
Interface
CAN, LIN
Voltage - Supply
5.5 V ~ 27 V
Mounting Type
Surface Mount
Product
Controller Area Network (CAN)
Number Of Transceivers
2
Supply Voltage (max)
27 V or 52 V
Supply Voltage (min)
5.5 V
Supply Current (max)
10 mA or 25 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935288866518

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UJA1061TW/5V0/C/T,518
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
UJA1061_6
Product data sheet
6.8.1.2 Off-line mode
6.8.2 LIN wake-up
6.8.3 Termination control
The LTC bit can be used to set the LIN transceiver to a Listen-only mode. The transmitter
output stage is disabled in this mode.
When leaving Active mode the LIN transmitter is disabled and the LIN receiver is
monitoring the LIN-bus for a valid wake-up.
Off-line mode is the low power mode of the LIN transceiver. The LIN transceiver is
disabled to save supply current. Pin RXDL reflects any wake-up event at the LIN-bus.
For a remote wake-up via LIN a LIN-bus signal is required as shown in
The RTLIN pin is in one of 3 different states: RTLIN = on, RTLIN = off or RTLIN = 75 μA;
see
During Active mode, with no short-circuit between the LIN-bus and GND, pin RTLIN
provides an internal switch to BAT42. For master and slave operation an external resistor,
1 kΩ or 30 kΩ respectively, can be applied between pins RTLIN and LIN. An external
diode in series with the termination resistor is not required due to the incorporated internal
diode.
Fig 10. LIN wake-up timing diagram
Figure
11.
All information provided in this document is subject to legal disclaimers.
wake-up
Rev. 06 — 9 March 2010
LIN
Fault-tolerant CAN/LIN fail-safe system basis chip
t BUS(LIN)
001aad447
UJA1061
© NXP B.V. 2010. All rights reserved.
Figure
10.
24 of 77

Related parts for UJA1061TW/5V0/C/T,